1. Software Design Hooked on Harmonix - Group 2 Tom Bottonari

2. Memory Mapping / Coding style Instruction cache - on chip RAM Stack - on chip RAM Sprites - Flash / Logic Elements on FPGA Double Buffer - SRAM chips  Page-Flipping Event/Interrupt driven  Processor sleeps until note timing sent to FPGA or key pressed

3. Software Flowchart Load program from flash Load sprites from flash to buffers Display start/song menu Song chosen? No Yes

4. Software Flowchart Load song from flash Pass note info sequentially to FPGA Watch MIDI input Correct note in time tolerance? NoYes

5. Software Flowchart NoYes Increment score (show message) Decrement score (show message) End of song? Show final score No Yes

6. VHDL Block Diagram VGA out SRAM B1SRAM B2 Startup Screen Song List Screen Gameplay Screen End of Song Screen Control Unit startup_trigstart_data 8 song_trigsong_data game_triggame_data end_trigend_data 8 8 8 color_code clk 8 8 8 8 v_sync h_sync r g b 88R1R2W1W2 clk reset s_data1 OE1WE1CE1OE2WE2CE2 188 8 addr1data1addr2data2 flash_dataflash_addrflash_dataflash_addrflash_dataflash_addrflash_dataflash_addr keys_pressed 48 bar_gridb(from SRAM) 4800 8 score Accuracy_text 2

7. Questions?