0. Nyquist-Rate Digital-to-Analog Converters

1. DAC Architectures
Chiu's Slides

2. DAC Architectures Decoder Based Binary-weighted
Unit-element (thermometer-coded)
Segmented
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3. Resistor-String DAC with a Tree-Like Decoder
B1: MSB
B3: LSB
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4. Resistor-String DAC with Digital Decoding
B1: MSB
B3: LSB
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5. Folded Resistor-String DAC
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6. Binary-Weighted Resistor DAC
B1: MSB
B4: LSB
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7. Binary-Weighted R-2R DAC
B1: MSB
B4: LSB
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8. Binary-Weighted Current-Mode DAC
B1: MSB
B4: LSB
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9. Binary-Weighted Current-Steering DAC
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bn-1: MSB
b0: LSB

10. Simplified Model
= 𝑅 𝐿 𝑅 𝑁
Chiu's Slides

11. Simplified Model
𝐴𝑠𝑠𝑢𝑚𝑒 𝑛=12−𝑏𝑖𝑡, 𝑅 𝐿 =25, 𝐼𝑁𝐿<1   2 2𝑛−2 <1  𝑅 𝐿 𝑅 𝑁 2 2𝑛−2 <1
𝑅 𝑁 = 𝑅 𝑢 + 𝑅 𝑜𝑛 ≈ 𝑅 𝑢
𝑅 𝐿 𝑅 𝑢 2 2𝑛−2 <1
25× 2 2×12−2 < 𝑅 𝑢
100 𝑀< 𝑅 𝑢
Chiu's Slides

12. Random Mismatch in Current Sources
Assuming constant β, we have:
Assuming constant Vth, we have:
Assuming Vth and β are independent and have Gaussian pdf, we have:
Chiu's Slides
Variances of Vth and β depend on W×L and technology as follows:

13. Example
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14. Con’td
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15. Binary-Weighted Charge-Redistribution DAC
B0: LSB
Bn-1: MSB
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16. Binary-Weighted Charge-Redistribution DAC
B0: LSB
Bn-1: MSB
Chiu's Slides

17. Binary-Weighted Charge-Redistribution DAC
B0: LSB
Bn-1: MSB
Chiu's Slides

18. Binary-Weighted Hybrid Capacitive-Resistive DAC
B0: LSB
Bn-1: MSB
Overall Resolution: n+3
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19. Glitch Problem of the Binary-Weighted DAC
Due to timing error , we may have:
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20. Glitch Problem (cont’d)
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21. Unit Element (Thermometer code) DAC
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22. Unit Element DAC (cont’d)
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23. Segmented DAC MSB DAC: M-bit Unit Element DAC
LSB DAC: L-bit Binary Weighted DAC
Resolution: N = M + L
2M+L switching elements
Small glitches
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24. Segmented DAC
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25. Segmented DAC
Current Steering DAC
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26. Current Cell
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27. Commercial Example (AD9754)
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28. Segmented DAC
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