1. Tracking Triggers Fabrizio Palla INFN Pisa

2. F. Palla INFN Pisa The Tracker and the Trigger n Trigger rates control is extremely challenging in high luminosity hadron collider experiments u As the luminosity increases, physics goals change in response to new discoveries and the detector ages. n It is thus essential that the trigger system be flexible and robust, and have redundancy and significant operating margin u Providing high quality track reconstruction over the full detector can be an important element in achieving these goals. n This has certainly been the case in the CDF experiment where the Silicon Vertex Trigger (SVT) has significantly extended the experiment’s physics capability u B-physics and B s oscillations u Search for the Higgs boson n Even more challenging will be the trigger for the foreseen upgrade of LHC, the so-called SuperLHC (SLHC) u Luminosity increase of a factor 10 wrt “standard” LHC

3. F. Palla INFN Pisa Main issues for Tracker Trigger Without pixel With pixel  (z 0 ) Without pixel With pixel  (d 0 ) n Data Rate in Tracker Volume at SLHC  About 12,000 tracks per bunch crossing (50 ns) in the Tracker volume |  |<2.5 and ~400 primary vertices/bx l Needs fairly high granular information u At 30 cm radius the rate is ~30 to 70 MHz cm -2 giving O(10K) links for 2.5 Gbps link speed l Need to reduce information for trigger purposes n Benefits to go to large radii u Lower occupancy u Better momentum measurement u Ideal to match with muon and calorimeter triggers u ~1 mm pointing resolution for z- larger than average 2 pileup interactions (~0.4 mm) u Still fairly nice impact parameter resolution in transverse plane (~100 mm for 10 GeV muons) to get rid of muons from p and K decays

4. F. Palla INFN Pisa Tracker primitives from CDF SVX approach 1 AM for each enough-small  Patterns Hits: position+time stamp All patterns inside a single chip N chips for N overlapping events (identified by the time stamp) Event1 AMchip1 Event2 AMchip2 Event3 AMchip3 EventN AMchipN Main problem: input Bandwidth  divide the detector in thin  sectors. Each AM searches in a small  OFF DETECTOR Data links

5. F. Palla INFN Pisa Trigger working model  References  F. Palla, JINST 2:P02002,2007  F. Palla, F. Crescioli and F. Catastini, 15th IEEE Real Time Conference 2007 (RT 07)  G. Barbagli, G. Parrini and F. Palla TWEPP-07, Prague 2007  F. Palla, Vertex 2007 workshop  Subdivide the detector in many (~100)  sectors  Keep data volume limited in each sector  Match with the detector sizes  Well contained within the curvature of high pT tracks  Majority of at least 3 layers out of 5 in each trigger sector  Data transfer  Reduce the data rate for Trigger purpose  Use only a part for Trigger (data reduction on module)  Coarser resolution with compromise in momentum resolution  Stacked detector layout  Cluster shape based approach – see later  Use very high speed data links O(Gbps) to limit the no. of links to manageable level  Process the data using AM – Large data rate (up to hundreds of Gbps/sector)  Must distribute the data in parallel to many AM to accommodate bandwidth  Higher speed wrt CDF (asymptotically must go to 200 MHz)  Higher density patterns (90 or 65 nm technology)  Implement an efficient switch  Output of the Trigger  Tracks reconstructed above a given p T sector by sector

6. F. Palla INFN Pisa Layouts under study Trigger sector 10 sensors layers Stacked 15 sensors layers Smaller  = greater p T Smaller width = greater p T

7. F. Palla INFN Pisa MIP Cluster width discrimination 90 cm 70 cm 50 cm 30 cm Discrimination of low p T tracks made directly on the strip detector by choosing suitable pitch values in the usual range for strip sensors. n In the region above 50 cm, using 50µm pitch, about 5% of the total particles leave cluster sizes with ≤2 strips u No. of links (2.5Gbps) ~300 for whole tracker n Once reduced to ~100 KHz, it would only need few fast readout links to readout the entire Tracker

8. F. Palla INFN Pisa On the opposite side: FPGA for the same AMchip P. Giannetti et al. “A Programmable Associative Memory for Track Finding”, Nucl. Intsr. and Meth., vol. A413/2-3, pp.367-373, (1998). AM chips from 1992 to 2005 (90’s) Full custom VLSI chip - 0.7  m (INFN-Pisa) 128 patterns, 6x12bit words each 32k roads / wedge F. Morsani et al., “The AMchip: a Full-custom MOS VLSI Associative memory for Pattern Recognition”, IEEE Trans. on Nucl. Sci., vol. 39, pp. 795-797, (1992). In the middle: Standard Cell 0.18  m (INFN-Pisa)  5000 pattern/chip AMchip L.Sartori, A. Annovi et al., “A VLSI Processor for Fast Track Finding Based on Content Addressable Memories”, IEEE Transactions on Nuclear Science, Volume 53, Issue 4, Part 2, Aug. 2006 Page(s):2428 - 2433 NEXT: NEW VERSION For both L1 & L2 Plan to increase the frequency to 200 MHz and make use of 90 or 65 nmtechnology for AM chips

9. F. Palla INFN Pisa Board dimensions n Current board dimensions  The current AM for CDF holds ~5000 patterns/6 planes in 0.18  m technology  If developed in the 90 nm technology one could accommodate ~4 times more patterns/AM chip hence 30,000 for 4 planes  In order to evaluate the board dimensions need to define the granularity and the lowest p T threshold  For instance, a 50  m pitch on 4 detector planes and a p T threshold of 10 GeV needs ~90,000 patterns (needs 3 AM chips)  It could of course go down in pT at the expenses of the no. of AM chips

10. F. Palla INFN Pisa Electron/gamma rates n HLT reduction is coming from pixel matching, E/p and isolation. Can it be done at L1?  Current E/g Trigger granularity  = 0.087x 0.087 is too coarse for pixel matching l @4 cm (0.35x0.35) cm 2 x 300 cm -2 MHz/20 MHz ~ 2 hits/bx l @11 cm (1x1) cm 2 x 100 cm -2 MHz/20 MHz ~ 5 hits/bx l Exclude the possibility to have any possibility to have individual layer data reconstructed u Is there a possible way out? 1. Reduce the “search” window by a factor~10 – going to a granularity of 2x2 crystals or even lower. 2. Make use of “stacked” pixel layers at ~10 cm to make track stubs l Very hard 3. Explore starting the track stub at larger radii l Doable needs to define the radius u E/p and isolation at L1 will be comparable to the current HLT with the Tracker Trigger l Easy to implement in a AM model 2x10 33 170 KHz@10 35

11. F. Palla INFN Pisa A first idea on selective readout from muons n Provide a Muon Track Tag (MTT) to be associated with hits in outermost Tracker layers u Need a new detector for MTT yet to be defined (2 layers of RPC?) n Plug inside a AM and flag as interesting track u A. Montanari et al (CMS IN 2007- 058) AM chip Muon/ECAL p T, 

12. F. Palla INFN Pisa What about jets? n Once tracks are formed, jets can be found quite easily. u Minimum reconstructable p T driven by several factors l In the AM approach it depends upon the size of the AM chips u However it is clear advantage to have jets reconstructed by tracks as shown in several CMS group meetings l High efficiency l Very good pointing resolution l To be combined with calorimeters jets to improve energy resolution u Help reducing the number of fake jets from the calorimeters u Could distinguish jets coming from different primary interactions (remember 400 primary vertices @10 35 ) DAQ TDR P. Azzurri and D. Dobur

13. F. Palla INFN Pisa Conclusions n Tracker information helps reducing drastically the rate of uninteresting events u CDF SVT experience has become cornerstone for Tracker Trigger l B physics reach has been boosted after the usage of displaced vertex triggers and now Higgs search uses it n S-CMS will make use of tracking information at SLHC and has started to discuss several options u Triggering at SLHC is challenging due to fantastic data rate u SVT approach seems feasible, especially if complemented by a data reduction at the module level  The Tracker trigger will be highly beneficial for reducing the rate of Muons, Calorimeter jets and E/  l Must develop a working model to how better integrate tracking and the Calo/Muons. u Next steps will involve simulating trigger with different layouts and are going to define which strategy will be used, stay tuned!

14. F. Palla INFN Pisa BACKUP

15. F. Palla INFN Pisa Too large AM? 2 step approach 1.Find low resolution track candidates called “roads”. Solve most of the pattern recognition 2.Then fit tracks inside roads. Thanks to 1 st step it is much easier Super Bin (SB) OTHER functions are needed inside SVT: Hit Buffer + Track fitter + Hit Finder

16. F. Palla INFN Pisa On going AM projects n Apart from SVT: Silicon Vertex Trigger @ CDF (L. Ristori et al.) u first AM application u proven to be easy to upgrade (1-2 years turn around time) n FTK: FastTracK @ ATLAS (University of Chicago, Laboratori Nazionali di Frascati, Harvard University, Univeristy of Illinois, University of Pisa and INFN Pisa, INFN Roma) u Full tracker reconstruction @ L2 @ full L1 out rate 100kHz n SLIM5: L1 tracking @ SuperB (F. Forti, M. Giorgi et al.) u R&D to develop MAPS sensor integrated with AM trigger n Ongoing R&D linked to CMS u Joint venture with CDF l CDF (Padova, Pisa, Siena) and CMS (Napoli, Perugia, Pisa, Roma) u Main goals: l Demonstrating AM-based Tracker Trigger also in conjunction with muon and electron triggering l Feasibility study of the switch using synergy with SLIM5 (INFN) developed boards u Funding status l Submitted proposal to Ministry of Research for FY 2008-09

17. F. Palla INFN Pisa CDF Rate reduction

18. F. Palla INFN Pisa The Event... The Pattern Bank The pattern bank is flexible set of pre-calculated patterns:  can account for misalignment  changing detector conditions  beam movement  … Pattern matching in CDF (M. Dell’Orso, L. Ristori – 1985)

19. F. Palla INFN Pisa Stacked readout for Trigger n Angle  determines p T of track, assuming tracks coming from origin u Smaller a = greater pT n Pair of sensor planes at ~ mm distance for local p T estimate u Needs a correlator ASIC u Fast data links l If located at ~20 cm needs 3 Gbps n Stacks of 2 sensor planes at ~cm distance to be correlated (off detector) for p T measurement n Tight construction tolerances required for both sensors and their alignment

20. F. Palla INFN Pisa switch board numbers All info here TBC with simulation and R&D! 80 switch boards 1 /  -sector 80 fibers / board assume 5Gbps each 40 AMchip / board now we can fit 32 AMchips in one 4 th of a 9U VME board 4 FPGA switches (1/layer) Each receiving ~20 fibers, i.e. ~100Gbps 40 outputs: one per Amchip Possible with today’s FPGAs 32 AMchips

21. F. Palla INFN Pisa

22. Occupancy  GEANT4 simulation of tracking layers  Includes material budget and loopers Radius (cm)Hit/module/bx a Rate*/module (Gbps)Rate*/sector (Gbps)No. data links † /layer 4043.6281703200 5033.5211303100 6025.5161755300 7020.2131104600 8016.611805300 9013.99603900 ª average number on minimum bias events, 50 ns bx *32 bits/hit † for a data link speed of 5 Gbps  Pros: same fiber links for data and trigger  Simple and elegant  Cons : large number of links needed  Need >=5Gbps laser drivers: 90 nm technology required  Allow for fluctuations: increase by ~1.5 ?  Laser driver power: commercial range from 330mW/fiber (4Gbps) to 700 mW/fiber (10Gbps) Current links in CMS Silicon Strip: 1300 @ 60 cm and 2600 @34 cm

23. F. Palla INFN Pisa Latency  ~100 m fiber 300 ns [6 bx]  Switch + AM ~1  s [20 bx]  Sensor read-out latency budget should be less than ~20 bx  TOTAL ~ <50 bx [2.5  s]

24. F. Palla INFN Pisa Stacked trigger