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Published byMelanie Fowler Modified over 8 years ago
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Memory Management & Virtual Memory
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Hierarchy Cache Memory : Provide invisible speedup to main memory
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Hierarchy Virtual Memory : Provide invisible extension to main memory
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Memory Management – Turns Logical addresses used by processor into physical addresses in memory
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Terminology Virtual/Logical Address : – Address program uses – Size determined by bits in memory address Physical Address : – Determined by available memory
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Virtual Memory How Why? – Logical space can be independent of physical space – Programs don't have to care about hardware
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Virtual Memory Why? – Allow programs to use more main memory than is physically present
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Virtual Memory How Why? – Allows multiple programs to coexist
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Virtual Memory How Why? – Allows multiple programs to coexist Everyone can use same logical addresses
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Virtual Memory How Why? – Allows multiple programs to coexist invisibly Some memory can be shared by processes
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Virtual Memory How Why? – Allows multiple programs to coexist invisibly Memory Management Unit can prevent access to unowned memory
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Terminology Page : block of memory in logical address space Page Frame : location in physical memory a page is placed
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Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address:
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Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address: Bring in from hard drive
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Terminology Page Fault : request for a page that is not in physical memory Paging : copying desired page from hard drive to RAM I need this address: Bring in from hard drive Record where I put it 3
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Process 24 bit addresses – 2^16 = 16 MB logical address space
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Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page
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Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page 256 pages of memory – 2^24 / 2^16 = 2^8 – Page table has 256 entries
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Process 24 bit addresses – 2^24 = 16 MB logical address space Pages will be 64Kb – 2^16 bytes in page – 16 bit address inside page 256 pages of memory – 2^24 / 2^16 = 2^8 – Page table has 256 entries 512 KB physical memory – 512 K / 64 K = 8 – 8 page frames of physical memory – 3 bit frame addresses
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Need logical address 0000 0111 0000 1010 0011 0010 Process
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Need logical address 0000 0111 0000 1010 0011 0010 Break into: – Logical page 0000 0111 – Address inside page 0000 1010 0011 0010
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Process Need logical address 0000 0111 0000 1010 0011 0010 Break into: – Logical page 0000 0111 – Address inside page 0000 1010 0011 0010 Lookup page in page table – Page is resident (in memory) – At 110
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Process Need logical address 0000 0111 0000 1010 0011 0010 Break into: – Logical page 0000 0111 – Address inside page 0000 1010 0011 0010 Lookup page in page table – Page is resident (in memory) – At frame address 110 Create physical address from frame + offset – 110 0000 1010 0011 0010
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Page Sizes Small page size = larger page table
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Page Sizes Small page size = larger page table Large page size = more unused data in pages
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Paging & Caching Page table held in main memory by OS
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Paging & Caching Page table held in main memory by OS Every mapping goes to main memory… Cache is worthless!
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TLB Transition look-aside buffer Cache for page table – Subset of page table – Fully associative – May be multiple levels
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