1. Computer Networks Laboratory project. In cooperation with Mellanox Technologies Ltd. Guided by: Crupnicoff Diego. Gurewitz Omer. Students: Cohen Erez. Gindi Nimrod. Krig Amit.

2. Introduction Today's computing model is becoming more distributed as companies work to meet the growing demands of the Internet economy. The demands of the Internet and distributed computing are challenging the scalability, reliability, availability, and performance of servers. To meet this demand a balanced system architecture with equally good performance in the memory, processor, and input/output (I/O) subsystems is required.

3. Seven of the computing industry's leaders, Compaq, Dell, Hewlett-Packard, IBM, Intel, Microsoft and Sun Microsystems have joined together to address this important issue by leading an independent industry body called the InfiniBandSM Trade Association. The association is dedicated to developing a new common I/O specification to deliver a channel based, switched fabric technology that the entire industry can adopt. InfiniBand™ Architecture represents a new approach to I/O technology and is based on the collective research, knowledge, and experience of the industry's leaders. Introduction

4. Topics of Discussion In this project we will implement a packet generator/transmitter focusing on InfiniBand™ protocol (release 1.0). This project will include 4 main parts: 1. Learning and understanding deeply, the new InfiniBand™ Architecture. 2. Preparing requirements and design documents for the SW and HW. 3. Writing the pattern/packets generator software for the InfiniBand protocol, and driver for the HW (FPGA). 4. The implementation of a new HW device based on FPGA unit capable to transmit 2.5Gbit per second.

5. Short description of the Requirements The system will allow the user to send InfiniBand packets generated by the software and other patterns as well. Purpose of the system Functional Requirements Sending InfiniBand packets through a graphic user interface. Graphics User Interface All the inputs to the packet generating software will be done in a graphical environment.

6. Short description of the Requirements The system will be used on NT 4.0 workstations. Environment requirements Testing After design and implementation will be over, a set of test will be preformed including: Performances. Counters. VLs (will be define) To be define.

7. HW description. I2C connector FPGA Unit (125 MHz DDR) IB port 2.5 GB/sec SerDes 10  1