1. Penn ESE370 Fall2010 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 31: November 22, 2010 Inductive Noise

2. Today Inductive Responses Calculating L Where do inductances show up Impact of inductance on digital circuits How address Penn ESE370 Fall2010 -- DeHon 2

3. Response What happens here? Penn ESE370 Fall2010 -- DeHon 3

4. LC Response Penn ESE370 Fall2010 -- DeHon 4 V2V2

5. LC Response Penn ESE370 Fall2010 -- DeHon 5

6. LC Response Penn ESE370 Fall2010 -- DeHon 6

7. LC Response Penn ESE370 Fall2010 -- DeHon 7

8. LC Response Penn ESE370 Fall2010 -- DeHon 8

9. LC Response Penn ESE370 Fall2010 -- DeHon 9

10. LC Response Penn ESE370 Fall2010 -- DeHon 10

11. LC Response Penn ESE370 Fall2010 -- DeHon 11

12. Response? Penn ESE370 Fall2010 -- DeHon 12

13. RLC Response Penn ESE370 Fall2010 -- DeHon 13 V2V2

14. RLC Response Penn ESE370 Fall2010 -- DeHon 14

15. RLC Response Penn ESE370 Fall2010 -- DeHon 15

16. Solving for w Penn ESE370 Fall2010 -- DeHon 16

17. RLC Penn ESE370 Fall2010 -- DeHon 17

18. RLC Penn ESE370 Fall2010 -- DeHon 18

19. RLC For Oscillation Decay Penn ESE370 Fall2010 -- DeHon 19

20. RLC Response (R=100) Penn ESE370 Fall2010 -- DeHon 20

21. When Oscillate Penn ESE370 Fall2010 -- DeHon 21

22. RLC Response Penn ESE370 Fall2010 -- DeHon 22

23. Inductance of Wire Penn ESE370 Fall2010 -- DeHon 23

24. Lwire Penn ESE370 Fall2010 -- DeHon 24 C and L per unit length

25. Chip Inductance C wire = 0.16 pF  for the 1mm) C wire = 0.16nF/m Permeability  0 ≈  Si02 =12.6×10 -7 H/m Permitivity  ox =3.5×10 -11 F/m Penn ESE370 Fall2010 -- DeHon 25

26. On Chip C wire = 0.16 pF  for the 1mm) C wire = 0.16nF/m Permeability  0 ≈  Si02 =12.6×10 -7 H/m Permitivity  ox =3.5×10 -11 F/m  pH (for 1 mm) Penn ESE370 Fall2010 -- DeHon 26

27. Comparisons 5mil trace on PCB –About 2.7nH/cm –http://www.pcb123.com/help/calculators/microstrip.html Protoboard wires (0.6mm diameter) –About 7nH/cm –http://www.consultrsr.com/resources/eis/induct5.htm On chip wire –0.28nH/mm = 2.8nH/cm Penn ESE370 Fall2010 -- DeHon 27

28. Inductors Bond pads Chip leads Long wire runs Cables Penn ESE370 Fall2010 -- DeHon 28 Src: http://en.wikipedia.org/wiki/File:Wirebonding2.svg

29. Where Arise Penn ESE370 Fall2010 -- DeHon 29

30. Signal Path Penn ESE370 Fall2010 -- DeHon 30

31. Power Ground Penn ESE370 Fall2010 -- DeHon 31

32. Estimate R eq, C eq for gates in parallel –R 0 = 25K  –C 0 = 0.01 fF say 10C 0 =0.1fF for typical load 250 gates switching at clock R eq = 100  C eq =25fF Assume L=1nH Penn ESE370 Fall2010 -- DeHon 32

33. Power Ground Penn ESE370 Fall2010 -- DeHon 33

34. RLC Response Penn ESE370 Fall2010 -- DeHon 34

35. Today’s Chips How many gates? Penn ESE370 Fall2010 -- DeHon 35

36. Multiple Power/Ground Pins Use many power/ground pins How many pins on a package? Divide switching gates by pins –To get effective load on each pin Penn ESE370 Fall2010 -- DeHon 36

37. How Improve Penn ESE370 Fall2010 -- DeHon 37

38. Minimize the L Make wires short Use power and ground planes Penn ESE370 Fall2010 -- DeHon 38

39. Add Good C’s Bypass Capacitors –On board –On chip Penn ESE370 Fall2010 -- DeHon 39

40. With Bypass Penn ESE370 Fall2010 -- DeHon 40

41. Minimize Current Draw More Power/Ground Pins Slower rise/fall times Spread out switching Penn ESE370 Fall2010 -- DeHon 41

42. Admin Wednesday –Homework due –Lecture Friday holiday Lecture on Monday Penn ESE370 Fall2010 -- DeHon 42

43. Idea Long wires are inductive –Avoid them –Especially on power supplies Bypass capacitors help Penn ESE370 Fall2010 -- DeHon 43