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M68k Addressing Modes ECE 511: Digital System & Microprocessor.

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Presentation on theme: "M68k Addressing Modes ECE 511: Digital System & Microprocessor."— Presentation transcript:

1 M68k Addressing Modes ECE 511: Digital System & Microprocessor

2 What we will learn in this session: M68k addressing modes:  How to access data: In registers. In memory.  Available addressing modes.  When to use what.

3 Introduction

4 All CPU instructions have similar requirements:  Action - What action should it perform?  Source - Where is the data that it is supposed to process?  Target - Where should it put the results? Action is done using instructions. Addressing modes identify source and target.

5 Addressing Modes Methods to access data inside:  CPU registers.  Memory. M68k allows 14 addressing modes:  Direct reference.  Indirect reference. Addressing modes allow flexible & effective programs design.

6 AM Data Register Direct Address Register Direct Implied Addressing Quick Immediate Data Immediate Data PC with Index PC with Displacement Absolute Long Address Absolute Short Address ARI + Displacement ARI + Index ARI + PostIncrement ARI + Predecrement Address Register Indirect Mem. Addressing Mode Register Addressing Mode

7 Register Addressing Modes

8 Modes to access registers in M68k:  Address Register.  Data Register. Consists of 2 methods:  Data Register Direct (DRD).  Address Register Direct (ARD).

9 DRD (Data Register Direct) Used to access data registers. Represented to as D n :  D represents data register.  n is register number.  From D 0 to D 7.

10 DRD Example MOVE.BD0,D1 ADD.WD4,(A0) MULUD5,D7

11 ARD (Address Register Direct) Used to access address registers. Referred to as A n :  A represents address register.  n is register number.  From A 0 to A 7. A 7 = stack pointer.

12 ARD Example MOVEA.LA0,A4 ADDA.WA3,A6 MOVEA.W#$1234,A2 LEA$1000,A4

13 Memory Addressing Modes

14 Modes to access memory locations. 12/14:  Memory space is large area.  Many varieties of addressing modes.  Depends on desired function.

15 ARI (Address Register Indirect) Refers to contents of memory location pointed by A n. Address register enclosed in parenthesis  (A n ).

16 Example: ARI D0 = $12345678 A1 = $007A92 MOVE.B D0,(A1) (This command does not move the data inside D0 into A1, but moves the data inside D0 into the memory location pointed by A1).

17 Example: ARI MOVE.BD1,(A4)  Moves a byte from D1 into the memory location specified by A4. ADD.W (A3),D3  Adds the word content of memory address specified by A3 to data register D3.

18 Example: ARI D0 = $12345678 A1 = $00007A92 MOVE.L D0,(A1) $12 $34 $56 $78 $7A90 $7A92 $7A93 $7A94 $7A95 $7A91 D0.L = $12345678 Memory Contents A1 = $007A92 (A1 is still unchanged).

19 Try It Yourself STARTORG$1000 MOVE.L#$12345678,D0 LEA$7A92,A1 MOVE.LD0,(A1) ENDSTART

20 ARI + PI (Address Register Indirect with Post-Increment) Same as ARI, but A n automatically incremented after execution (post- increment). Use the ‘+’ sign after (A n ). Useful in for loops.

21 ARI + PI (Address Register Indirect with Post-Increment) Increment value depends on data length:  If.B is used, A n is incremented by 1.  If.W is used, A n is incremented by 2.  If.L is used, A n is incremented by 4.

22 Example 1: ARI + PI D0 = $12345678 A1 = $001002 MOVE.W D0,(A1)+ $78 $1001 $56 $1003 $1004 $1005 $1006 $1002 D0 = $12345678 Memory Content A1 = $1002 + 2 = $001004 (new value). After execution, A1 is incremented by 2 since.W was used.

23 Try It Yourself STARTORG$1000 MOVE.L#$12345678,D0 LEA$1002,A1 MOVE.WD0,(A1)+ ENDSTART

24 Example 2: ARI + PI D0 = $00000005*as counter A0 = $001000 A1 = $002000 LABEL1MOVE.B(A0)+,(A1)+ SUB.B#1,D0 CMP.B#0,D0 BNELABEL1 D0A0 5$1000 4$1001 3$1002 2$1003 A1 $2000 $2001 $2002 $2003 1$1004$2004 0$1005$2005

25 Try It Yourself STARTORG$1000 MOVE.B#5,D0 LEA$1000,A0 LEA$2000,A1 LABEL1MOVE.B(A0)+,(A1)+ SUB.B#1,D0 CMP.B#0,D0 BNELABEL1 ENDSTART

26 ARI + PD (Address Register Indirect with Pre-Decrement) Same as ARI, but value in address register automatically decremented before execution (pre-decrement). Use the ‘-’ before (A n ) sign. Useful to push data to stack.

27 ARI + PD (Address Register Indirect with Pre-Decrement) The increment value depends on data length:  If.B is used, A n is decremented by 1.  If.W is used, A n is decremented by 2.  If.L is used, A n is decremented by 4.

28 Example: ARI + PD – Moving Data to Stack D0 = $12345678 A6 = $001002 MOVE.B D0,-(A7) $78$1001 $1003 $1004 $1005 $1006 $1002 D0 = $12345678 Memory Contents A6 = $1002 - 1 = $001001 (new value). Before execution, A7 is decremented by 1 since.B was used. A7 (SP)

29 Try It Yourself STARTORG$2000 MOVE.L#$12345678,D0 LEA$1002,A6 MOVE.BD0,-(A6) ENDSTART

30 ARI + D (Address Register Indirect with Displacement) Adds a displacement value to ARI. Format: d(A n )  A n is address register.  d is 16-bit displacement value. The range of displacement is from $0000 to $FFFF.

31 Example: ARI + D D3 = $12345678 A4 = $004500 MOVE.B D3,$750(A4) A4=$004500, Disp.=$750 Effective Address: A4$004500 D$000750 + EA$004C50 $78 $4C4C $4C4E $4C4F $4C50 $4C51 $4C4D Memory Contents

32 Try It Yourself STARTORG$2000 MOVE.L#$12345678,D3 LEA$4500,A4 MOVE.BD3,$750(A4) LEA$750(A4),A5 ENDSTART

33 Example: ARI + D D3 = $00000000 A4 = $004500 MOVE.B $FFF3(A4),D3 $33 $44 $55 $66 $11$44F1 $22 $44F3 $44F4 $44F5 $44F6 $44F2 Memory Contents $FFF3 is negative (MSB = 1) 2’s complement = $000D Effective Address: A4$004500 Disp.$00000D – $0044F3 D3 = $00000033

34 Try It Yourself STARTORG$2000 MOVE.L#$12345678,D3 LEA$4500,A4 MOVE.BD3,$FFF3(A4) LEA$FFF3(A4),A5 ENDSTART

35 Example: ARI + D D3 = $00000000 A4 = $004500 MOVE.B -5(A4),D3 $14 $44F9 $44FB $44FC $44FD $44FE $44FA Memory Contents Effective Address: A4$004500 Disp.$000005 – $0044FB D3 = $00000014

36 ARI + D Example MOVE.BD1,34(A0) ADD.B$1254(A2),D4 Displacement must not be more than 16-bits long.

37 ARI + I (Address Register Indirect with Index) Similar to ARI + D, but adds another index term. Displacement range $80 (-128) < D < $7F (127). Index term from Dn or An. Used for implementing 2-D arrays. Adds index term into bracket:  D(An,Dn.W/L)  D(An,An.W/L) Effective address is ARI + D + Index (Dn.W/L or An.W/L).

38 ARI + I Example MOVE.BD1,34(A0,D3.W) ADD.B$54(A2,A4.W),D4 Displacement must be 8-bits long. Index must be 16-bits long.

39 ARI + I Example D1 = $00000012 A4 = $00001000 MOVE.B#$FF,$78(A4,D1.W) Effective Address (ARI + D + I): ARI$00001000 +D1.W$0012 +D$ 78 EA$0000108A $1088 $1089 $108A $108B $108C $108D $108E $FF

40 Try It Yourself STARTORG$2000 MOVE.W#10,D0 LEA$5000,A0 * EFFECTIVE ADDRESS IS * $5000 + $03 + $0A = $500D LEA3(A0,D0.W),A1 ENDSTART

41 ALA (Absolute Long Address) Directly addresses memory locations. Address must be 24-bits. No sign extension performed. Slower than ASA, requires more machine code.

42 ALA Example MOVE.LD0,$100100 ADD.B$001000,D3 MOVE.B$000100,$400400

43 Example: ALA MOVE.B$001000,D0  Moves byte content of memory address $1000 to D0. ADD.W$400400,D1  Adds the word content of $400400 to D1. MOVE.LD4,$003000  Moves a long-word from D4 to address $3000. *Address length must always be 24-bits

44 Absolute Long Address D1 = $00000000 MOVE.W$001000,D1 $1000 $1001 $1002 $1003 $1004 $1005 $1006$12 $FF $34 $12 $56 $AA $AC 00001234 D1 = Memory

45 Immediate Data Used to transfer constant values into registers/memory locations. Consists of 2 parts:  The constant value.  The register/memory location to store it in. Symbol ‘#’ must be put in front of the constant value.

46 Types of Constant SymbolData Type %Binary @Octal Decimal $Hexadecimal Example #%01101010 @123 #45 #$35 ‘ ’Character#’B’

47 Example: Moving Decimal Value to Data Register D0 = $FFFFFFFF MOVE.B#12,D0 Constant value: 12 D = #$0C FFFFFFFF D0 = FFFFFF0C Final D0 =

48 Example: Moving Hex Value to Memory MOVE.W#$1234,$004000 Constant value: $1234 (hex) Target: memory address $4000. $3FFE… $3FFF… $4000$12 $4001$34 $4002… Memory Address:

49 Example: Moving Hex Value to Address Register A3 = $00000000 MOVEA.L#$00400400,A3 Constant variable: 00400400 (hex) Target: A3. A3 = $00000000 A3 = $00400400

50 Example: Moving Hex Value to Memory MOVE.W#$1234,$004000 Constant value: $1234 (hex) Target: memory address $4000. $3FFE… $3FFF… $4000$12 $4001$34 $4002… Memory Address:

51 Example: Moving Character Value to Memory MOVE.L#’BUKU’,D0 ‘B’ = $42, ‘U’ = $55, ‘K’ = $4B, ‘U’ = $55 Target: D0. 55B45524 D0 = ‘B’‘U’ ‘K’

52 Example: Moving Binary Value to Memory MOVE.B#%10101011,D0 %1010 = $A, %1011 = $B Target: D0. BA000000 D0 =

53 Quick Immediate Data Similar to ID, but can only transfer 1 byte. Byte is sign-extended to 32-bits. Must be used together with MOVEQ instruction. Can only be used for D n.

54 Example: Quick Immediate Data D1 = $00000000 MOVEQ#$05,D1 Constant variable: 05 (hex) Target: D1. D1 = $00000000 D1 = $00000005 Sign-extended to 32-bits $05 = 0000 0101 (MSB is 0)

55 Example: Quick Immediate Data D0 = $00000000 MOVEQ#$EA,D0 Constant value: EA (hex) Target: D0. D0 = $000000EA D0 = $FFFFFFEA Sign-extended to 32-bits $EA = 1110 1010 (MSB is 1)

56 Example: Quick Immediate Data D1 = $FFFFFFFF MOVEQ#$05,D1 Constant value: 05 (hex) Target: D1. D1 = $FFFFFFFF D1 = $FFFFFF05 D1 = $00000005 Sign-extended to 32-bits $05 = 0000 0101 (MSB is 0)

57 Implied Addressing Uses mnemonics to refer to M68k’s internal registers. Examples:  SR – Status Register  USP – User Stack Pointer.  SSP – Supervisor Stack Pointer.  CCR – Condition Code Register  TRAPV – Trap exception if V-bit set.

58 IA Example – Set Trace Mode ORI.W #$8000,SR TSI2I2 I1I1 I0I0 XNZVC Sets trace mode to on (T = 1), other bits unchanged. OLD SR= 1000001100010000 0000001100010000 1000000000000000 OR NEW SR=

59 IA Example – Clear CCR ANDI.B #$00,CCR 11010 Clears all bits in CCR AND 00000000 X N Z V C 00000000 OLD CCR = NEW CCR =

60 Unsupported Addressing Modes

61 The addressing modes listed after this slide are not supported by Easy68k. They are provided for the sake of knowledge, and are available for self- study. It is sufficient to concentrate on the previously presented addressing modes.

62 Absolute Short Address* Used to directly address data in two memory ranges:  $000000 to $007FFF.  $FF8000 to $FFFFFF. Only specify 16-bit address, automatically sign-extended to 24-bits. Requires less machine code than ALA. Be careful with sign-extension.

63 Example: Absolute Short Address SUB.B$4601,D4 4 6 0 1 0100 0110 0000 0001 MSB is 0 0 0 4 6 0 1 0000 0000 0100 0110 0000 0001 sign-extended to 24-bits Will subtract the byte value in address $004601 from D4 E.A. is $004601

64 Example: Absolute Short Address MOVE.B $8432,D3 8 4 3 2 1000 0100 0011 0010 MSB is 1 F F 8 4 3 2 1111 1111 1000 0100 0011 0010 sign-extended to 24-bits Will move byte value from address $FF8432 to D3. E.A. is $FF8432

65 ASA vs. ALA MOVE.B $8432,D3 and MOVE.B$FF8432,D3 are equal, but MOVE.B $8432,D3 executes faster & uses less memory space.

66 Proof that ASA is Unsupported STARTORG$2000 *THIS SHOULD GO TO $FFF123 *BUT IT GOES TO $00F123 MOVE.B#$AA,$F123 ENDSTART

67 PC + D (Program Counter with Displacement)* Similar to ARI + D, but An replaced with PC. Allows flexible program placement:  Can be put anywhere in memory.  Address referred relative to PC.  Would still run even with different starting addresses.

68 Program Counter with Displacement Format: d(PC)  PC is program counter.  d is 16-bit displacement value. 16 bit displacement:  -32,768 ($8000) ≤ d ≤ 32,767 ($7FFF) Displacement must be properly calculated during program design.

69 PC + D Example PC = $004000 D1 = $12345678 MOVE.B $32(PC),D1 Effective Address: PC = $004000 D =$ 32 EA =$004032 $403334 $4034$45 $4035$56 $4036$67 $4032$23 $4031$12 Memory D1 = 56231234 +

70 Proof that PC + D is Unsupported STARTORG$2000 *A0 SHOULD BE $2032 ($2000 + $32) *BUT ITS VALUE IS $0032 LEA$32(PC),A0 ENDSTART

71 Why PC + D allows flexible addressing? Data #1 Data #2 Data #3 Instruction #1 Instruction #2 Instruction #3 … … Instruction #n In PC + D, the location of data is always stated as relative to instruction. Data #1 is located 3 memory locations above Instruction #1 Data #2 is located 2 memory locations above Instruction #1

72 Why PC + D allows flexible addressing? Data #1 Data #2 Data #3 Instruction #1 Instruction #2 Instruction #3 … … Instruction #n When the program is run, PC is incremented as instructions are executed. PC

73 Why PC + D allows flexible addressing? Data #1 Data #2 Data #3 Instruction #1 Instruction #2 Instruction #3 … … Instruction #n When program running, data location referred to PC. Data #1 is located 3 memory locations above PC Data #2 is located 2 memory locations above PC

74 Address Space Wherever you put the program, PC-relative addressing always refers to the right location. Data #1 Data #2 Data #3 Instruction #1 Instruction #2 Instruction #3 … … Instruction #n Address Space Data #1 Data #2 Data #3 Instruction #1 Instruction #2 Instruction #3 … … Instruction #n Data #1 Data #2 Data #3 Instruction #1 Instruction #2 Instruction #3 … … Instruction #n Data #1 is located 3 memory locations above PC Data #1 is located 3 memory locations above PC Data #1 is located 3 memory locations above PC *Assuming PC @ Instruction #1

75 PC + I (Program Counter with Index)* Similar to ARI + I, but An replaced with PC. Allows similar flexibility as PC + D. Format:  d(PC,Dn)  d(PC, An)  PC is program counter.  d is 8-bit displacement value.

76 PC + I (Program Counter with Index) 8-bit displacement:  -128 ($80) ≤ d ≤ 127 ($7F) Displacement must be properly calculated during program design.

77 PC + I Example D1 = $00000388 PC = $00003000 MOVE.B#$A2,$FA(PC,D1.W) Effective Address (PC + D + I): PC$00003000 +D1.W$0388 -D$ 06 EA$00003382 $3380 $3381 $3382 $3383 $3384 $3385 $3386 $A2 *$FA = -6 (2’s complement)

78 Conclusion

79 We have covered these addressing modes DRDD0  D7 ARDA0  A7 Dn and An ARI(An) ARI+PI(An)+ ARI+PD-(An) ARI+DD(An) ARI+ID(An,Dn/An.s) PC+D D(PC) PC+I D(An,Dn/An.s) ALA$001001 ASA$FFAA IACCR, SR Effective Address: ID #($ % @ ‘’) Immediate data:

80 Conclusion Addressing modes allow flexibility in accessing registers memory locations. Try to understand how to calculate EA:  ARI (PI, PD, D, I) The rest are straightforward.

81 The End Please read: Antonakos, pg. 47-58


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