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Published byRoland Jacobs Modified over 8 years ago
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Data and Computer Communications Digital Data Communications Techniques + Error Control+ Digital Data Communications Techniques + Error Control+Multiplexing
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Asynchronous and Synchronous Transmission Timing problems require a mechanism to synchronize the transmitter and receiver ◦ receiver samples stream at bit intervals ◦ if clocks not aligned and drifting will sample at wrong time after sufficient bits are sent Two solutions to synchronizing clocks: ◦ Asynchronous transmission ◦ Synchronous transmission
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Asynchronous Transmission
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Data are transmitted one character at a time. Each character begins with a start bit that alerts the receiver that a character is arriving. The receiver samples each bit in the character and then looks for the beginning of the next character. It would not work well for long blocks of data because the receiver's clock might eventually drift out of synchronization with the transmitter's clock. When no character is being transmitted, the line between transmitter and receiver is in an idle state (binary 1 level). The beginning of a character is signaled by a start bit with a value of binary 0. This is followed by the 5 to 8 bits that actually make up the character. The bits of the character are transmitted beginning with the least significant bit. Then the data bits are usually followed by a parity bit, set by the transmitter such that the total number of ones in the character, including the parity bit, is even (even parity) or odd (odd parity). The receiver uses this bit for error detection. The final element is a stop element, which is a binary 1. A minimum length for the stop element is specified, and this is usually 1, 1.5, or 2 times the duration of an ordinary bit. No maximum value is specified. Because the stop element is the same as the idle state, the transmitter will continue to transmit the stop element until it is ready to send the next character. The timing requirements for this scheme are modest.
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Asynchronous - Behavior simple cheap overhead of 2 or 3 bits per char (~20%) good to use for data with large gaps.
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Synchronous Transmission block of data transmitted sent as a frame clocks must be synchronized – can use separate clock line – or embed clock signal in data need to indicate start and end of block – use preamble and postamble more efficient (lower overhead) than asynchronous
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Types of Error An error occurs when a bit is altered between transmission and reception single bit errors – only one bit altered (does not affect nearby bits) – caused by white noise Burst errors – contiguous sequence of B bits in which first and last and any number of intermediate bits in error – caused by impulse noise or by fading in wireless – effect greater at higher data rates
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Error Detection will have errors detect using error-detecting code added by transmitter recalculated and checked by receiver still chance of undetected error
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Parity Bit Error Detection – Parity bit set so character has: 1. Even number of ones(even parity) 2.Odd number of ones (odd parity) – Even number of bit errors goes undetected – Detects only an odd number or bit errors
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Error Detection Process
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Cyclic Redundancy Check one of most common and powerful checks for block of k bits transmitter generates an n bit frame check sequence (FCS) transmits k+n bits which is exactly divisible by some number receiver divides frame by that number – if no remainder, assume no error
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Error Correction Correction of detected errors usually requires data block to be retransmitted Not appropriate for wireless applications – bit error rate is high causing lots of retransmissions – when propagation delay long (satellite) compared with frame transmission time, resulting in retransmission of frame in error plus many subsequent frames instead need to correct errors on basis of bits received error correction is capable of correcting certain errors in a transmitted bit stream.
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Error Correction Process
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How Error Correction Works Adds redundancy to transmitted message can deduce original despite some errors e.g. block error correction code – map k bit input onto an n bit codeword – each distinctly different – if get error assume codeword sent was closest to that received means have reduced effective data rate
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How Error Correction Works The ratio of redundant bits to data bits, (n – k)/k, is called the redundancy of the code. The ratio of data bits to total bits, k/n, is called the code rate.
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Line Configuration - Topology physical arrangement of stations on medium: – point to point - two stations such as between two routers / computers – multi point - multiple stations traditionally mainframe computer and terminals now typically a local area network (LAN)
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Line Configuration - Topology
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Line Configuration - Duplex Half duplex (two-way alternate) – only one station may transmit at a time – requires one data path Full duplex (two-way simultaneous) – simultaneous transmission and reception between two stations – requires two data paths separate media or frequencies used for each direction
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Data Link Control Protocols Need layer of logic above Physical To manage exchange of data over a link: – Frame synchronization – Flow control – Error control – Addressing – Control and data – Link management
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Flow Control Data are sent in a sequence of frames. Each frame containing a portion of the data and some control information ensure sending entity does not overwhelm receiving entity – by preventing buffer overflow influenced by: – transmission time time taken to emit all bits into medium – propagation time time for a bit to traverse the link
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Model of Frame Transmission
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Error Control Errors to be detected and corrected are: a)lost frames b)damaged frames Error Control techniques use: 1)Error detection 2)Positive acknowledgment 3)Retransmission after timeout 4)Negative acknowledgement & retransmission
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Multiplexing Multiple (many) links on 1 physical line Common on long-haul, high capacity, links Techniques: FDM, TDM, STDM
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Frequency Division Multiplexing (FDM)
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used with analog signals. A number of signals are carried simultaneously on the same medium by allocating to each signal a different frequency band. FDM is possible when the useful bandwidth of the transmission medium exceeds the required bandwidth of signals to be transmitted. A number of signals can be carried simultaneously if each signal is modulated onto a different carrier frequency and the carrier frequencies are sufficiently separated that the bandwidths of the signals do not significantly overlap.
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Frequency Division Multiplexing (FDM) Six signal sources are fed into a multiplexer, which modulates each signal onto a different frequency (f 1, …, f 6 ). Each modulated signal requires a certain bandwidth centered on its carrier frequency, referred to as a channel. To prevent interference, the channels are separated by guard bands, which are unused portions of the spectrum. The composite signal transmitted across the medium is analog. Note, however, that the input signals may be either digital or analog. In the case of digital input signals, it must be passed through modems to be converted to analog signals. Each input analog signal must then be modulated to move it to the appropriate frequency band.
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Synchronous Time Division Multiplexing (STDM)
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Used with digital signals or analog signals carrying digital data. Data from various sources are carried in repetitive frames. Each frame consists of a set of time slots, and each source is assigned one or more time slots per frame.
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Summary Asynchronous verses synchronous transmission Error detection and correction Line configuration issues Data link control protocol Flow control Error control Multiplexing (FDM – TDM)
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