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1 COMP541 Final Missing Pieces of MIPS: Adding Memory & I/O Montek Singh Apr 6, 2010
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2 Summary of Remaining Labs April 9: Complete the CPU Show: Show: show a complete and working Lab 7 Do: Do: add shift instruction add keyboard/joystick integrate with your VGA code April 16: Demo development Show: Show: show a complete and working Lab 8 Do: Do: develop your game/demo app April 23: Wrap up demo show demo! show demo!
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A few tips on finishing up your MIPS Sign extension: simple assume all of your I-type instructions are signed assume all of your I-type instructions are signed e.g., lw, sw, addi, beq thus, simply sign-extend every immediate operand thus, simply sign-extend every immediate operand just extend value of bit 15 to upper 16 bits Single-cycle vs. multi-cycle I think single-cycle is easier I think single-cycle is easier Memory I think making your own is easier than using Block RAMs I think making your own is easier than using Block RAMs Do everything step-by-step! 3
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This is your single-cycle MIPS 4
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5Memory Word width 16 or 32 bits? 16 or 32 bits? Addressing Byte address or word address? Byte address or word address?
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6 Expanding Memory Block First let’s look in detail at data memory block See how to add block memories Add I/O? 7-segment 7-segment Char. terminal Char. terminal
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Memory Block Signals 7 Address – 32 bits Write Data – 32 bits Read Data – 32 bits Mem Write – 1 bit Mem Read – 1 bit
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8 Using 2 Smaller RAMs If you are using Block RAMs may have to combine multiple to provide adequate size may have to combine multiple to provide adequate size (that’s why I recommend making your own RAM!) (that’s why I recommend making your own RAM!) example: example:
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9 Block RAM Specs Try two 1024x16 2 parity bits unused 2 parity bits unused Gives 1K words (32-bit) Gives 1K words (32-bit) Could add 2 more RAMs to increase mem to 2K words
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10 Memory Map Refers to how physical memory is populated In our example, memory from 0 to 1023 (or 2047) It’s in multiple blocks, but that’s invisible to programmer It’s in multiple blocks, but that’s invisible to programmer
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11 Another Portion of Memory Let’s see how to add a block of x8 character memory for the VGA
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12 Memory Map Instruction and Data Memory Empty… Character Memory 0 0 000 001 -024 1 000 000 000 1 000 002 048 Do you test all bits in your memory decoder? Up to you. Keep in mind: your character memory may have different word widths your character memory may have different word widths e.g., x1, or x8, etc. e.g., x1, or x8, etc. you may need to do some address and data conversion you may need to do some address and data conversion
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13 Adding I/O Look at memory-mapped I/O Conceptually like this
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14 In Reality Isolated from CPU On standard buses PCI PCI Ours will typically be simpler Just memory addresses Just memory addresses
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15Later You’ll add joystick or keyboard (or both) into memory locations that you can read e.g., at two locations right above character memory e.g., at two locations right above character memory
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16 How Does Processor Begin? One way is to initialize PC to 0 or some other predefined address or some other predefined address Make sure to have instructions there Modern computers have flash memory to boot CPU or go to configuration utility Modern computers have flash memory to boot CPU or go to configuration utility On (very) old computers had to enter boot program on front panel On (very) old computers had to enter boot program on front panel
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Shift Instructions You may want to add simple shift instructions To multiply by factors of 2 To multiply by factors of 2 e.g., shift-logical-left, shift-logical-right and shift-arithmetic-right you could simply implement shifts by “1” –i.e., perhaps ignore greater shift amounts So let’s talk about shifters (and shift registers) 17
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Shift Types Logical shift: shifts value to left or right and fills empty spaces with 0’s Ex: 11001 >> 2 = 00110 Ex: 11001 >> 2 = 00110 Ex: 11001 << 2 = 00100 Ex: 11001 << 2 = 00100 Arithmetic shift: same as logical shifter, but on right shift, fills empty spaces with the old most significant bit (msb). Ex: 11001 >>> 2 = 11110 Ex: 11001 >>> 2 = 11110 Ex: 11001 <<< 2 = 00100 Ex: 11001 <<< 2 = 00100 Rotate: rotates bits in a circle, such that bits shifted off one end are shifted into the other end Ex: 11001 ROR 2 = 01110 Ex: 11001 ROR 2 = 01110 Ex: 11001 ROL 2 = 00111 Ex: 11001 ROL 2 = 00111
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Shift Register Symbol: Implementation: Shift a new value in on each clock edge Shift a value out on each clock edge Serial-to-parallel converter: converts serial input (S in ) to parallel output (Q 0:N-1 )
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Shift Register with Parallel Load When Load = 1, acts as a normal N-bit register When Load = 0, acts as a shift register Now can act as a serial-to-parallel converter (S in to Q 0:N- 1 ) or a parallel-to-serial converter (D 0:N-1 to S out )
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Adding Shift Instruction: First Thought Make a parallel-load, bidirectional shift register Anything wrong with that? Anything wrong with that? 21
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22 Takes Multiple Clocks First clock loads shift reg Second makes the shift Third loads to destination reg And that’s for a one-bit shift Any alternatives?
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Simple Shifter Design Left shiftR shift Arithmetic R shift
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24 Is This Better? Three short clocks may be faster than one limited by gate delays But complex control But complex control We could implement 1 or n bit shift instruction MIPS has up to 31 bits MIPS has up to 31 bits
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25 Lots of Muxes When n gets larger, this becomes large Can use levels of muxes Similar to carry-lookahead adder Similar to carry-lookahead adder
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My recommendation Implement sll, srl, sra… … with constant shift amount of “1” … with constant shift amount of “1” you can always do bigger shifts by repeating in software you can always do bigger shifts by repeating in software 26
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