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ELECTRONICS II VLSI DESIGN FALL 2013 LECTURE 5 INSTRUCTOR: L.M. HEAD, PhD ELECTRICAL & COMPUTER ENGINEERING ROWAN UNIVERSITY.

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Presentation on theme: "ELECTRONICS II VLSI DESIGN FALL 2013 LECTURE 5 INSTRUCTOR: L.M. HEAD, PhD ELECTRICAL & COMPUTER ENGINEERING ROWAN UNIVERSITY."— Presentation transcript:

1 ELECTRONICS II VLSI DESIGN FALL 2013 LECTURE 5 INSTRUCTOR: L.M. HEAD, PhD ELECTRICAL & COMPUTER ENGINEERING ROWAN UNIVERSITY

2 Deriving the I/V Equation Gradual Channel Approximation Voltage along the channel. Is the potential difference between the gate electrode and the channel. Includes both the voltage needed to turn on the MOSFET and the voltage to build the inversion layer.

3 Charge/unit area in the inversion layer. Charge/unit area required to create a conducting channel from source to drain.

4 Charge in inverted channel = difference between charge in the inversion layer and charge required to create the conducting channel. Differential resistance in the channel:

5 Deriving the I/V Equation

6

7 This is the linear or triode region equation and is valid for: V GS ≥ V THN and V DS ≤ V GS – V THN β is the gain.

8 Saturation

9 When V DS =V GS - V THN Valid for V DS ≥ V GS – V THN and V GS > V THN

10 Channel Length Modification Channel resistance changes because the dimensions are changing. The change in output current with increasing V DS

11 Channel Length Modulation

12 I-V Characteristics


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