2. CHAPTER 4 :JFET Junction Field Effect Transistor

3. Introduction (FET)  Field-effect transistor (FET) are important devices such as BJTs  Also used as amplifier and logic switches  Types of FET: MOSFET (metal-oxide-semiconductor field-effect transistor) Depletion-mode MOSFET JFET (junction field-effect transistor)  What is the difference between JFET and MOSFET?

4. Types of Field Effect Transistors (The Classification)  JFET MOSFET (IGFET) n-Channel JFET p-Channel JFET n-Channel EMOSFET p-Channel EMOSFET Enhancement MOSFET Depletion MOSFET n-Channel DMOSFET p-Channel DMOSFET FET

5. BJT-Current-controlled device FET –voltage controlled device

6. Junction FETs (JFETs)  JFETs consists of a piece of high- resistivity semiconductor material (usually Si) which constitutes a channel for the majority carrier flow.  Conducting semiconductor channel between two ohmic contacts – source & drain

7. Junction field-effect transistor (JFET)

8. N-channel JFET..

9. JFET for V GS = 0 V and 0<V DS <|V p | Channel becomes narrower as V DS is increased

10. Pinch-off (V GS = 0 V, V DS = V P ).

11. Application of a negative voltage to the gate of a JFET.

12. PP + - DC Voltage Source + - + - N N Operation of a JFET Gate Drain Source

13. Figure: The nonconductive depletion region becomes broader with increased reverse bias. (Note: The two gate regions of each FET are connected to each other.) Operation of JFET at Various Gate Bias Potentials

14. Water analogy for the JFET control mechanism

15. Gate Drain Source SYMBOLS n-channel JFET Gate Drain Source n-channel JFET Offset-gate symbol Gate Drain Source p-channel JFET

16. Junction FETs  JFET is a high-input resistance device, while the BJT is comparatively low.  If the channel is doped with a donor impurity, n-type material is formed and the channel current will consist of electrons.  If the channel is doped with an acceptor impurity, p-type material will be formed and the channel current will consist of holes.  N-channel devices have greater conductivity than p-channel types, since electrons have higher mobility than do holes; thus n-channel JFETs are approximately twice as efficient conductors compared to their p-channel counterparts.

17.  N channel JFET: Major structure is n-type material (channel) between embedded p-type material to form 2 p- n junction. In the normal operation of an n-channel device, the Drain (D) is positive with respect to the Source (S). Current flows into the Drain (D), through the channel, and out of the Source (S) Because the resistance of the channel depends on the gate-to-source voltage (V GS ), the drain current (I D ) is controlled by that voltage N-channel JFET

18. HHigh input impedance (M  ) (Linear AC amplifier system) TTemperature stable than BJT SSmaller than BJT CCan be fabricated with fewer processing BBJT is bipolar – conduction both hole and electron FFET is unipolar – uses only one type of current carrier LLess noise compare to BJT UUsually use as logic switch Introduction.. (Advantages of FET)

19. Disadvantages of FET  Easy to damage compare to BJT  ???

20. P-channel JFET..

21. p-Channel JFET

22. JFET Characteristic Curve  To start, suppose V GS =0  Then, when V DS is increased, I D increases. Therefore, I D is proportional to V DS for small values of V DS  For larger value of V DS, as V DS increases, the depletion layer become wider, causing the resistance of channel increases.  After the pinch-off voltage (V p ) is reached, the I D becomes nearly constant (called as I D maximum, I DSS -Drain to Source current with Gate Shorted)

23. I D versus V DS for V GS = 0 V. JFET Characteristic Curve

24. n-Channel JFET characteristics curve with I DSS = 8 mA and V P = -4 V. JFET Characteristic Curve

25. p-Channel JFET characteristics with I DSS = 6 mA and V P = +6 V.

26. Characteristics for n-channel JFET

27. JFET Characteristic Curve..  For negative values of V GS, the gate-to-channel junction is reverse biased even with V DS =0  Thus, the initial channel resistance is higher (in which the initial slope of the curves is smaller for values of V GS closer to the pinch-off voltage (V P )  The resistance value is under the control of V GS  If V GS is less than pinch-off voltage, the resistance becomes an open-circuit ;therefore the device is in cutoff (V GS =V GS(off) )  The region where I D constant – The saturation/pinch- off region  The region where I D depends on V DS is called the linear/triode/ohmic region

28. P + + + Characteristics for p-channel JFET

29. Operation of n-channel JFET  JFET is biased with two voltage sources: V DD V GG  V DD generate voltage bias between Drain (D) and Source (S) – V DS  V DD causes drain current, I D flows from Drain (D) to Source (S)  V GG generate voltage bias between Gate (G) and Source (S) with negative polarity source is connected to the Gate Junction (G) – reverse- biases the gate; therefore gate current, I G = 0.  V GG is to produce depletion region in N channel so that it can control the amount of drain current, I D that flows through the channel

30. Transfer Characteristics The input-output transfer characteristic of the JFET is not as straight forward as it is for the BJT. In BJT: I C = I B which  is defined as the relationship between I B (input current) and I C (output current).

31. Transfer Characteristics.. In JFET, the relationship between V GS (input voltage) and I D (output current) is used to define the transfer characteristics. It is called as Shockley’s Equation: The relationship is more complicated (and not linear) As a result, FET’s are often referred to a square law devices V P =V GS (OFF)

32.  Defined by Shockley’s equation:  Relationship between I D and V GS.  Obtaining transfer characteristic curve axis point from Shockley: When V GS = 0 V, I D = I DSS When V GS = V GS(off) or V p, I D = 0 mA Transfer Characteristics…

33. Transfer Characteristics JFET Transfer Characteristic CurveJFET Characteristic Curve

34. Exercise 1 V GS IDID 0I DSS 0.3VpI DSS /2 0.5VpI DSS /4 Vp0 mA Sketch the transfer defined by I DSS = 12 mA dan V GS(off) = - 6

35. Exercise 1 Sketch the transfer defined by I DSS = 12 mA dan V GS(off) = V p= - 6 I DSS I DSS /2 I DSS /4 V GS =0.3V P V GS =0.5V P

36. Answer 1

37. Exercise 2 V GS IDID 0I DSS 0.3VpI DSS /2 0.5VpI DSS /4 Vp0 mA Sketch the transfer defined by I DSS = 4 mA dan V GS(off) = 3 V

38. Exercise 2 Sketch the transfer defined by I DSS = 4 mA dan V GS(off) = 3V V GS =0.5V P V GS =0.3V P VPVP I DSS I DSS /2 I DSS /4

39. Answer 2

40. DC JFET Biasing  Just as we learned that the BJT must be biased for proper operation, the JFET also must be biased for operation point (I D, V GS, V DS )  In most cases the ideal Q-point will be at the middle of the transfer characteristic curve, which is about half of the I DSS.  3 types of DC JFET biasing configurations : Fixed-bias Self-bias Voltage-Divider Bias

41. Fixed-bias + V in _ + V out _ +  Use two voltage sources: V GG, V DD  V GG is reverse- biased at the Gate – Source (G-S) terminal, thus no current flows through R G (I G = 0).

42. Fixed-bias..  DC analysis All capacitors replaced with open-circuit Loop 1

43. Fixed-bias… 1.Input Loop  By using KVL at loop 1: V GG + V GS = 0 V GS = - V GG For graphical solution, use V GS = - V GG to draw the load line For mathematical solution, replace V GS = -V GG in Shockley’s Eq.,therefore: 2.Output loop - V DD + I D R D + V DS = 0 V DS = V DD – I D R D 3.Then, plot transfer characteristic curve by using Shockley’s Equation

44. Example : Fixed-bias Determine the following network: 1.V GSQ 2.I DQ 3.V D 4.V G 5.V S

45. Mathematical Solutions

46. Graphical solution for the network Draw load line for:

47. Self-bias  Using only one voltage source

48. DC analysis of the self-bias configuration. Q point for V GS

49. Graphical Solutions: Defining a point on the self-bias line. V GS IDID 0I DSS 0.3VpI DSS /2 0.5VpI DSS /4 Vp0 mA

50. Graphical Solutions: Sketching the self-bias line.

51. Mathematical Solutions:  Replacein the Shockley’s Equation:  By using, quadratic equation and formula, choose value of I D that relevant within the range (0 to I DSS ): nearly to I DSS /2  Find V GS by using ;also choose V GS that within the range (0 to V P )

52. Example : Self-bias configuration

53. Graphical Solutions:

54. Sketching the transfer characteristics curve VgsIDID 0I DSS 0.3VpI DSS /2 0.5VpI DSS /4 Vp0 mA

55. Sketching the self-bias line

56. Graphical Solutions: Determining the Q- point Q-point I DQ =2.6mA V GSQ =-2.6mV

57. Mathematical Solutions

58. Solutions I DQ = 2.6mA I D =I S

59. Voltage-divider bias A I G =0A

60. Redrawn network

61. Sketching the network equation for the voltage-divider configuration.

62. Effect of R S on the resulting Q-point.

63. Example : Voltage-divider bias

64. Solutions

65. Determining the Q-point for the network I DQ =2.4mA V GSQ =-1.8V

66. Mathematical solutions  How to get I DS, V GS and V DS for voltage-divider bias configuration by using mathematical solutions?

67. Exercise 3:

68. Drawing the self bias line

69. Determining the Q-point I DQ =6.9mA V GSQ =-0.35V

70. Exercise 4

71. Determining V GS Q for the network.