1. CONDITION EVALUATE CPSR Flags

2. Hazard Checking Logic Checks to see if Rd (destination register) is read from in next 2 commands

3. Hazards Read after Write: FETCH DEC EXEC DATA WB FETCH DEC EXEC DATA WB 1. 2. STALL

4. Hazards Branch: FETCH DEC EXEC DATA WB FETCH DEC EXEC DATA WB 1. 2. 3. 4. FETCH DEC EXEC DATA WB FETCH DEC EXEC DATA WB (Branch Target)

5. Original Design

6. Overview

7. Data Forwarding FETCH DECODE EXEC DATA BUFFER WRITEBACK Result Data

8. Block Data Transfer

9. 32-Bit Barrel Shifter Carry In / Carry Out -Carry in only used in RRX (rotate right extended) operations -Carry out always computed, even though not needed in rotate operations

10. Carry Out Logic: Two Options Separate logic computes Cout early using input and shift amount Pros: -Cout signal ready much earlier, no need for propagation -Simpler bit shifter designs Cons: -Many more gates needed

11. Carry Out Logic: Two Options Individual bit shifters compute and propagate Cout signal Pros: -Simpler overall design -Fewer logic gates Cons: -Takes longer for Cout to be ready (propagation delay) -More complicated bit shifters

12. Conclusion Went ahead and implemented Cout logic in the bit shifters -Don’t really need the signal to be ready any earlier than the rest of the shifter output, especially not at the addition gate cost -Each shifter computes Cout for its own shift amount and passes it on, or leaves Cout alone if it is disabled

13. Barrel Shifter Result propagated through bit shifters Added 32-bit Shifters

14. 16 Bit-Right Shifter

15. Complete Shifter