1. Memory: Page Table Structure CSSE 332 Operating Systems Rose-Hulman Institute of Technology

2. Memory management unit Translates Virtual Addresses page tables translation lookaside buffer (TLB) Page tables One for kernel addresses one or more for user space processes Page Table Entry (PTE) for user space processes Typically 32 bits page frame, protection, valid, modified, referenced

3. Address translation A logical address Virtual page number + offset Finds PTE for virtual page number Extract frame number and append offset Fail (MMU raises an exception - page fault): bounds error - outside address range validation error - non-resident page protection error - not permitted access

4. Imagine you have a computer that has 32 bit logical addresses. Given that a page is 4KB (2 12 bytes) … a) what is the minimum size of a page table entry, assuming physical addresses in this system are 32 bits? b) How big (in total) must the page table for each process be, assuming each page table entry was 4 bytes?

5. Structure of the page table Hierarchical Paging Inverted Page Tables Inverted Page Tables with Hashing

6. Hierarchical page tables Break up the logical address space into multiple page tables A simple technique is a two-level page table

7. Two-level page-table scheme

8. Two-level paging example A logical address (on 32-bit machine with 1K page size) is divided into: a page number consisting of 22 bits a page offset consisting of 10 bits Since the page table is paged, the page number is further divided into: a 12-bit page number a 10-bit page offset Thus, a logical address is as follows: where pi is an index into the outer page table, and p2 is the displacement within the page of the outer page table page number page offset pipi p2p2 d 12 10

9. Two-level page table example (2) Consider a process as described here: Logical address space is 4-GB (232 bytes) Size of a page is 4KB (212 bytes) There are ___ pages in the process. This implies we need ____ page table entries in the process page table. If each page table entry occupies 4-bytes, then we need a ______ byte large page table The page table will occupy __________ pages. Root table will consist of ____ entries one for each page that holds part of the process page table Root table will occupy 212 bytes 4KB of space will be kept in main memory permanently A page access could require two disk accesses

10. Two-level page table example (3) Consider a process as described here: Logical address space is 4-GB (232) Size of a page is 4KB (212 bytes) There are 220 pages in the process. (232/212) This implies we need 220 page table entries in the process page table, one entry per page. If each page table entry occupies 4-bytes, then we need a 222 byte (4MB) large page table. The page table will occupy 222/212 i.e. 210 pages. Root table will consist of 210 entries one for each page that holds a part of the process page table Root table will occupy 212 bytes 4KB of space will be kept in main memory permanently A page access could require two disk accesses

11. Always in main memory Brought into main memory as needed

12. Inverted page table The page table can get very large An inverted page table is another solution An inverted page table has an entry for every frame in main memory and hence is of a fixed size This is why it is called an inverted page table Also contains info to identify process A hash function is used to map the page number (and process ID) to the frame number A PTE has a page number, process id, valid bit, modify bit, chain pointer

13. Inverted page table matches Page # and PID Offset Frame # Offset VMPID,Page # Virtual AddressPhysical Address Page Frame Program Paging Hardware Memory Inverted Page Table Page # Search Frame #

14. Inverted page table with hashing matches Page # and PID Offset Frame # Offset VMPID,Page # Virtual AddressPhysical Address Page Frame Program Paging Hardware Memory Inverted Page Table Page # Search Hash Hash Table Synonym Chain

15. Hashing techniques (b) Chained rehashing Hashing function: X mod 8