1. 6 April 2007G. Rakness (UCLA) 1 CSC runs at minus side slice test 27 Mar. 2007 – 5 Apr. 2007 Color scheme: Successes Problems/questions Greg Rakness University of California, Los Angeles

2. 6 April 2007G. Rakness (UCLA) 2 Run 57012 250k events; trigger=singles ME-3/2/19 Report from DQM… All unpacked events: –do have this chamber in readout 100% –with all boards (ALCT, TMB, CFEB) present 100% A. Korytov (Florida)

3. 6 April 2007G. Rakness (UCLA) 3 Run 57013 1M events; trigger = singles on all chambers Trigger signals at Sector Processor (K. Kotov, Florida): – timed to within 0.2bx, except… – ME-3/1/10 ~ 0.6bx –Settings based on AFEB  ALCT and ALCT  TMB cable lengths successful (M. Ignatenko, UCLA) Data from ME-2/2/16 ALCT is bad, found to be ALCT and/or skew-clear cable. Remove ME-2/2/16 from data acquisition path… (Note: trigger = singles on all chambers for runs discussed today)

4. UF group 29 March 2007 4 ALCT0_BXN - L1A_BXN: PERFECT Run 57013: ALCT0-L1A BXN difference = 3, 4 Run 539: ALCT0-L1A BXN difference = 3 (the same for all!) A. Korytov (Florida) [Value of xml parameter alct_l1a_delay: Run 57013 = constant value Run 539 = set for each chamber to be value measured with scan]

5. UF group 29 March 2007 5 Raw anode hits: PERFECT 7.5 A. Korytov (Florida) Run 539: Anode hits for all chambers are captured right in the middle of the 0-15 window (average is ~7.5 for all chambers) [Formula by J. Hauser (UCLA) and A. Madorsky (Florida): If alct_l1a_delay has been timed in to be in the middle of the ALCT L1A window, then the number of time bins before pretrigger is equal to (alct_fifo_pretrig-6)+(alct_l1a_window_size-1)/2.] Time bin ALCT wiregroup

6. UF group 29 March 2007 6 CLCT0_BXN - L1A_BXN: no changes CLCT0-L1A BXN difference = -1, 0 A. Korytov (Florida) [No change observed, even though the setting for tmb_l1a_delay did change: Run 57013 = constant for all chambers Run 539 = value measured by TMB-L1A delay scan Why?]

7. 6 April 2007G. Rakness (UCLA) 7 Run 542: Upgrade TMB firmware to 9 January 2007 version ISE compiled bug fix on 2 nd CLCT zero dead-time triad decoders Data look good with ISE compilation… A. Korytov (Florida) …(relatively minor) issues of word count in DMB data quality check… Go back to 5 September 2006 version (MTCC version)…

8. 6 April 2007G. Rakness (UCLA) 8 Runs 546, 547: Upgrade ALCT firmware to 2 April 2007 version… modified timing of mux clock/control Run 57013: “ratty” anode wiregroup occupation histograms… Run 547: smooth distributions A. Korytov (Florida) ME-2/1/8 ME-3/1/8 Run 547 = HV on ring 1 chambers only, in order to trigger only on ring 1 CRC errors persist (<0.1/mil on 8/16, ~1% on 1/16)  cable at CFEB? Fiber?

9. 6 April 2007G. Rakness (UCLA) 9 Run 552: Upgrade peripheral crate software w/expanded TMB, ALCT, DMB configuration from xml TMB/ALCT config verified with “check configuration” button Upgrade ME-3/1 with ALCT576mirror firmware v.02Apr07 Wiregroup distributions look good (begin at 1, end at 96) “Complete set” of parameters available to study trigger configurations ME-3/1/8 TMB was not triggering (similar occasional “slot 2 problem” seen during MTCC) ME-3/1/8 Run 546:Run 552: ME-3/1/8 A. Korytov (Florida)

10. 6 April 2007G. Rakness (UCLA) 10 To do: update TMB firmware when available… header update to solve word count issue bit to turn off LCT  MPC (?) begin implementing configure using hard reset Does CSC handle it correctly? TMB and DDU counters checked during MTCC, but data never taken… Does ME-3/1/8 come back? begin systematic study of trigger configuration (see Jay’s talk)