1. A Low-noise Front-end ASIC design based on TOT technique for Read-out of Micro-Pattern Gas Detectors Huaishen Li, Na Wang, Wei Lai, Xiaoshan Jiang 1 State Key Laboratory of Particle Detection and Electronics, 2 Institute of High Energy Physics(IHEP), CAS lihs@ihep.ac.cn

2. Outline Read-out of Micro-pattern gas detectors LCSA-v1 prototype: functionality and features Design and performance of LCSA-v1 Plans and perspective 2

3. MicroMEGAS detector 3 − One kind of Micro-pattern gas detector − Particle track image − 2D/3D track reconstruction − No leakage current compensation − High counting rate, high position resolution − Used for synchrotron experiment Spec. for strip MicroMEGS detector Capacitor per strip<40pF Charge /strip/hit5-120fC ENC<2000e- INL<1% Channels16/32channel/ASIC

4. Read-Out System of MicroMEGAS 4 Detector chambers 2D read-out Strip pitch: 0.5mm Area: 10x10cm ~ 400channels 16channel /chip Q(charge) and T(time) info. ENC<2000e- Time jitter< 5ns TDC based on FPGA (Wave Union: WUTDC) 64channel per FPGA RMS: <1ns for this system

5. Read-out chip for MicroMEGAS 2013: LCSA-v1 –Technology: 0.35µm CMOS process –Channels: 16 per chip –Charge range: 2~200fC –ENC: 2000e- @Cdet=40pF –INL: <3% –Time jitter: <5ns –Power dissipation: 1mA/channel @VDD=3.3V –Discharge current is adjustable –Counting rate: 100kHz 5

6. LCSA-v1: MPW prototype Each channel measures: –T: hit arrival time –Q: charge, time-over-threshold, the pulse width after the discriminator is proportional to the charge Trigger mode –Self-triggering Read-out mode –parallel Other functionalities –Linear discharge –The threshold of every channel is adjustable 6

7. LCSA-v1: the single channel 7 Bandgap, bias, control logic, calibratioin First stage: low noise current amplifier Second stage: current mirror, as a current amplifier Third stage: the charge is linear discharged by a constant current source 8-bit DAC: can be adjustable, tune the threshold level of the discriminator

8. The first stage 8 Output current: Current gain: @ This stage is a low noise front-end stage It can get a current gain of Csh/Cf, output current shaper is almost the same to the input signal

9. Linear discharge stage 9 Features -can get Q & T -low time jitter, time walk -constant current feedback -low noise -fast response

10. Time-over-threshold measurements 10 27.714ns/fC 5fC-120fC Time width Input charge Vth Leading edge: hit time

11. Discriminator circuit 11 Pre-amp and latch Comparator with hysteresis Hysteresis simulation Time of propagation delay simulation ‘Real signal’ sim.

12. 8-bit DAC design 12 A 8-bit DAC/ channel Threshold regulation Tune range ： 0.3V - 1.65V INL ：＜ ±0.2LSB DNL ：＜ ±0.2LSB

13. Circuit simulation: noise performance 13 ENC ： 2000e@C det =40pF Zero capacitor noise ： 1026.3e-

14. Circuit simulation: INL 14 INL<3%@5~120fC input INL can be enhanced by time walk correction

15. Circuit simulation: time character 15 @threshold=0.8fC Input range ， 5-120fC Time walk Time jitter Time walk: 28ns(can be corrected by software) Time jitter: <5ns

16. Summary LCSA-v1 is a prototype of a front-end ASIC(0.35µm CMOS technology) for read-out of Micro-Pattern Gas Detectors, like GEM, MicroMEGAS and so on. This ASIC is designed based on ToT technique, TDC is not put into the first version of the chip. In the first step, TDC is designed based on FPGA. Maybe in the next version, every channel will be equipped with a TDC In the next several months, we will get preliminary test results of this ASIC 16

17. 17 Thank you for your attention ！