1. transform your ideas into products 1 High Speed Design Basic ㈜ 에이로직스 성남시 분당구 야탑동 275-4 성원프라자 402호 전화 : 0342-703-5006 팩스 : 0342-781-5006 www.alogics.co.kr

2. transform your ideas into products 2 Agenda High-speed design Basic –Highlights and explains analog circuit principles relevant to high-speed digital design High-Speed Board Design –Create a design with timing and noise constraints –Rule driven design: from electric to physical High-speed Analysis –Modeling to HS analysis –Timing and Noise Analysis –Analyzing Report files Lab

3. transform your ideas into products 3 What is High-Speed Design Emphasizes the behavior of passive circuits elements Passive elements include the wires, circuit boards, and integrsted circuits packages Studies how passive circuit elements affect: –Signal propagation (ringing and reflections) –Interaction between signals (crosstalk) –Interactions with the natural world (EMI/EMC)

4. transform your ideas into products 4 Interconnect Effects –For high-performance boards, MCMs and systems, interconnect design must be specified and driven from electrical requirements to: Meet setup and hold times & guarantee signal integrity Avoid design / layout / verification iterations Ensure low manufacturing costs and high reliability IC/MCM PCB System

5. transform your ideas into products 5 Clock speeds Increasing Clock speeds are Now Limited by Interconnect Delays As clock frequencies increase interconnect delay budgets decrease 10 - 15 ns 45 - 50 ns 1985 Clock frequency Clock cycle Interconnect width - 16 MHz. - 60 ns - 15 mil 1995 Clock frequency Clock cycle Interconnect width - 120 MHz. - 8 ns - 5 mil 1- 3 ns 5-7 ns clk Left for interconnectChip delay

6. transform your ideas into products 6 Today’s Technologies Faster Rise Times & Lower Noise Margins

7. transform your ideas into products 7 Signals A Ideal Pulse A Single Pulse ? A Scope View A "Build-a-thousand" Scope View An Output With Insufficient Current Drive An Output With Insufficient Capacitive Drive Load Impedance Mismatch

8. transform your ideas into products 8 Analysis Requires "Build-a-Thousand" OR Inversion, Sequential & Logic Errors, Contention Logic Sim. Noise, Ringing & Crosstalk HS Analysis Timing Violations, Races & Hazards Critical Timing Logic Incompatibility, AC & DC Loading, Etc. DRC Check Manufacturing Faults Fault Test

9. transform your ideas into products 9 Fundamentals When a Wire is Not a Wire Knee Frequency Propagation Delay Lumped vs. Distributed Systems Four Kinds of Lumped Reactance

10. transform your ideas into products 10 When a wire is not a wire. At low frequencies, an ordinary wire will effectively short together two circuits At high frequencies, only a wide, flat object can short two circuits A wire has too much inductance to function at high frequencies A one inch wire loop About 100 nH X 100 MHz = 62 

11. transform your ideas into products 11 High Frequency Effects Mutual capacitance –Crosstalk between high impedance circuits Capacitance –Slow down fast signals Inductance –Wires don’t act as short circuits Mutual inductance –Crosstalk between circuit traces Skin effect resistance –Signal loss degrades margins

12. transform your ideas into products 12 Matter for Digital Design Knee frequency is a function of rise/fall time, not repetition rate. Knee Frequency F knee = 0.5 TrTr Frequency below which most energy in a digital pulse concentrates Pulse rise time

13. transform your ideas into products 13 F knee of random digital wave form Clock period Rise/Fall time T 10-90 90% 10% Maximum slope equals T 10-90 V V Rise time not drawn to scale For this example, assume rise/fall time is 1/100 of clock period For this example, 1 MHz clock, 10 nS rise/fall

14. transform your ideas into products 14 Expected spectral power density of Random digital wave form Knee frequency Clock rate 0 -20 -40 -60 -80 -100 0.11101001000 Frequency, relative to clock rate Expected signal amplitude in dB Nulls appear at multiples of the clock rate Nulls appear at multiples of the clock rate 20 dB/decade straight slope continues up to knee frequency 10-90% rise or fall time in this example is 1/100 of clock period, so F knee = 50 x Clock rate

15. transform your ideas into products 15 How do we use F knee ? Use the frequency to predict how a circuit will respond to digital pulse. –Step edge: Evaluate circuit element reactances at f = –Long steady pulse: Evaluate circuit element reactances at f = 0.5 rise time 0.5 pulse time

16. transform your ideas into products 16 Propagation Delay T pd of Electromagnetic fields in various media MediumDelay ps/in Dielectric Constant Air (radio waves) Coax cable (75% velocity) Coax cable (66% velocity) FR4 PCB, outer trace FR4 PCB, inner trace Alumina PCB, inner trace 85 113 129 140-180 180 240-270 1.0 1.8 2.3 2.8-4.5 4.5 8.0-10.0

17. transform your ideas into products 17 Points to Remember  Propagation delay is proportional to the square root of the dierectric constant.  The propagation delay of signals traveling in air is 85 ps/in.  Outer-layer PCB traces are always faster than inner traces.

18. transform your ideas into products 18 Four Kinds of Lumped Reactance –Four circuit concepts separate the study of high- frequency digital circuits from that of low-speed digital circuits: C L Mutual C Mutual L

19. transform your ideas into products 19 Classify Reactance with a Step Response Test X(t) Step source + - RsRs Z Y(t) Step response + - I(t) Device under test shunts the step source Output impedance of step source

20. transform your ideas into products 20 Step Response of Various Reactances –Resistor Initial step to fraction of open circuit voltage Stays flat –Capacitor No initial step Ramps up to full output –Inductor Full size initial step Decays to zero same rise time as source Hold flat at fraction of step voltage Y(t) R R + R S same rise time as source Initial step is full size Y(t) Voltage decays to zero Y(t) Voltage approaches full output

21. transform your ideas into products 21 Calculating Capacitance from Rise Time Rise time T 0-63 = 23.5 ns Calculate capacitance: RC = T 0-63 T 0-63 R source C =

22. transform your ideas into products 22 Calculating Impedance of Capacitor The capacitor in this example presents a reactance of 20.44  to a rising edge of 3 ns. We therefore predict it will significantly distort (by slowing down) a 3-ns rising edge from a TTL driver having an output impedance of 30 . Old analog equation X C = 1 2  fC Substituting, f = 0.5 T r X C = TrCTrC = 20.44 

23. transform your ideas into products 23 Calculating Inductance from Decay Time Decay time T 80-30 = 1.4 ns Calculate capacitance: T 80-30 L = T 80-30 R source = 10.6 nH LRLR =

24. transform your ideas into products 24 Calculating Impedance of Inductor The inductor in this example presents a reactance of 9.4  to a rising edge of 3 ns. If this trace is used to ground a 50-  terminator for 3-ns rising edges, the composite termination value will be off by 20%. If this trace is used to ground a bank of eight 50-  terminators, the parallel impedance of eight terminators (50/8 = 6  ) is actually less than the trace impedance. When all eight terminated lines switch simultaneously, the terminating bank won’t work. X L = 2  f L X L =  L T 10-90 = 9.4 

25. transform your ideas into products 25 Mutual Capacitance Whenever there are two circuits, there is mutual capacitance. C R2R2 R3R3 0.1 in. End View of two adjacent terminating resistors No copper on circuit side of printed circuit board (PCB) 0.063-in.-thick epoxy FR-4 PCB Solid ground plane on solder side of PCB

26. transform your ideas into products 26 How Capacitive Coupling Works in Digital Circuits  V T 10-90 Maximum slope equals V(t) Digital drive signal Coupled current C dV dt Peak coupled current Peak coupled voltage C  V T 10-90 C  V R B T 10-90 Capacitively coupled current pulse

27. transform your ideas into products 27 Calculating Capacitance from Total Coupled Area Coupled voltage pulse C dV R B dt C  V R B = measured area Integrated of coupled voltage (measured area) measured area R B  V C = = 0.4 pF Not sensitive to pulse rise time!

28. transform your ideas into products 28 What happens when R 2 and R 3 are both grounded at on end? Imagine mutual capacitance connects midpoints of resistors. Voltage at mid-point of drive resistor is cut in half. Current received at victim resistor splits –2/3 goes to ground (through 25 ohms) –1/3 goes to load (through 75 ohms) Net result is 1/6 of coupling In this example, 2.5% crosstalk reduces to 0.4%

29. transform your ideas into products 29 Mutual Inductance Whenever there are two loops of current, there is mutual inductance. RARA I(t) Circuit A Circuit B Source of changing current Low impedance Coupled noise voltage from circuit A appears here + Y(t) LMLM

30. transform your ideas into products 30 How Mutual Inductance Works A B (1) Magnetic field strength is proportional to the loop current I(t) (4) Faraday’s law states that the induced voltage Y(t) is proportional to the rate of change of flux in loop B (2) A fixed fraction of the total flux from loop A passes through loop B (3) The rate of change of flux in loop B is proportional to the rate of change of current I(t) I(t) Y(t) + -

31. transform your ideas into products 31 Mutual Inductance Summary The voltage induced in loop B is propotional to the of change of current in loop A. The constant of proportionality is called the mutual inductance between circuits A and B. If the drive circuit is resistively damped, its current and voltage are related. V B = L dI A dt V B = L dV A dt 1RA1RA

32. transform your ideas into products 32 How Inductive Coupling Works in Digital Circuits  V T 10-90 Maximum slope equals V(t) Digital drive signal Coupled voltage Peak coupled voltage Integral of coupled voltage pulse L  V T 10-90 Inductively coupled voltage pulse L dV A dt 1RA1RA 1RA1RA L  V R A

33. transform your ideas into products 33 Comparision of Inductive and Capacitive Crosstalk Higher impedance circuits, involving lager dV/dt and smaller dI/dt experience more capacitive coupling. C crosstalk 0.4 % L crosstalk 3.3 % Typical ratio for 50-  circuits

34. transform your ideas into products 34 High Speed Board Design Technology File Electrical Class Rule (Vtg, Tr/Tf, Imp., Vxt) Topology (Source, Load, Termination) Group Rule Timing Constraint (Tmin, Tmax, Distance) Control stub,via, wrongway and length Characterize board materials Calculate electric parameters