1. MICROPROCESSOR DESIGN1 IR/Inductive Drop Introduction One component of every chip is the network of wires used to distribute power from the input power pin(s) to the circuitry inside. Since these wires have resistance and inductive impedance, the voltage that gets to the internal circuitry is less than that applied to the chip. If this voltage drop (often called the IR drop) is too severe, the circuits will not get enough voltage and can malfunction or not meet their timing specifications. A 5% voltage drop typically produces a 10 to 15% delay Power supply voltage drop

2. MICROPROCESSOR DESIGN2 IR/Inductive Drop Issues Complexity of Power Distribution Due –RLC Nature of the Interconnect –Frequency of Operation near 1 GHz –Powers of 100 W, Currents of 100 A, and V DD of 1.2 V –Allowable Voltage Noise at 10% of (V DD – Gnd) Over-design Incorporates Decoupling Capacitors that Have a Large Area Penalty Still Better Than Under-design Producing Non-Working Chips

3. MICROPROCESSOR DESIGN3 IR Drop Voltage reduction on the signal lines due to high resistance: –Interconnects scaling effect –Long and narrow lines increase the resistance of the interconnects

4. MICROPROCESSOR DESIGN4 IR Drop IR portion of voltage drop is caused by current flowing through a resistive network. –IR drop affects power (IR drop) and ground (bounce). –IR drop is local phenomenon that occurs when a number of gates in close proximity switch at once, or when resistance at a specific portion of the grid is larger than expected. –IR drop is global phenomenon in which activity in one region of a chip causes IR drop in other region. –Symptoms of IR drop include non-functional chips (worst case), chips that fail timing specification, or intermittent or vector- dependent failures.

5. MICROPROCESSOR DESIGN5 IR/Inductive Drop Inductive Portion of Voltage Drop is Caused by Package Pin Inductance – typically 1 to 2 nH. Wire Self-Inductance of About.5 pH/micron Becoming Important Ball-Grid Array Packaging Allows Power to be Supplied Directly to Most Regions of the Chip and Has 0.1 nH per Solder Bump

6. MICROPROCESSOR DESIGN6 Inductive Portion of Voltage Drop is Becoming Significant Consider a bump and via that produce.2nH of inductance on both a V DD and a Ground Line. Drivers on the line will draw around 25 mA over 100 ps time interval as shown. VL = 2 X L di/dt = 100mV This is About the Allowable Noise Margin Situation Far Worse with Wire Bond

7. MICROPROCESSOR DESIGN7 IR/Inductive Drop Overall slow down of the design due to slow charging of the devices. IR/Inductive Drop in the Signal Line adds to the Problem

8. MICROPROCESSOR DESIGN8 IR/Inductive Drop Physical Model Combined Resistive and Inductive Effects in Power/Ground System.

9. MICROPROCESSOR DESIGN9 Simultaneous Switching Noise Switch of all the lines simultaneously (such as an address bus that goes from all 1's to all 0's) can cause so-called “ground-bounce”; the flip-side of IR Drop

10. MICROPROCESSOR DESIGN10 Ground Bounce - A Closer Look

11. MICROPROCESSOR DESIGN11 IR Drop and Ground Bounce Fixes It’s the result of –Self-inductance of ground and power pins –Resistance of the Lines –Impedance-mismatch, or –Combination of above. In order to maximize “power integrity” provide: –Extra ground and power pins –Good bypassing, –Control the rate of rise/fall of the lines, –Impedance-matching termination,

12. MICROPROCESSOR DESIGN12 Decoupling Capacitance Design Used to Keep Power Supply within Noise Budget Decoupling Capacitors Are Large-Valued Capacitors that Hold a Reservoir of Charge Located Near the Power Pins and Any Large Driver Required Current for Switching is Provided by Local Decap On-Chip Decoupling Capacitance Implemented Using NMOS Transistor

13. MICROPROCESSOR DESIGN13 On-Chip Decoupling Capacitance Implemented Using NMOS Transistor

14. MICROPROCESSOR DESIGN14 Reduce IR Drop by Path Alterations

15. MICROPROCESSOR DESIGN15 Identification of IR Drop Regions

16. MICROPROCESSOR DESIGN16 Power Grid Analysis Transistor-level analysis is done by modeling the transistors as current sources (tap currents) connected directly to the power grid –Tap current can be static or dynamic –In order to perform static or dynamic type analysis

17. MICROPROCESSOR DESIGN17 Analyzing IR Drop Current passing through VDD wire--in this case the power grid-- experiences some resistance throughout the long routes in the design. Power Grid analysis models transistors currents as current sources attached (tap currents) to the power grid

18. MICROPROCESSOR DESIGN18 Modeling Current Sources and Sinks Current at half-maximum

19. MICROPROCESSOR DESIGN19 Physical View of Power Grid

20. MICROPROCESSOR DESIGN20 Solving for the Supply Voltage and Current Levels at Each Cell

21. MICROPROCESSOR DESIGN21 Inclusion of Switching Information (Dynamic vector simulation)