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Next Generation E-Voting System with Haptic Touchscreen Interface and Voice Feedback for Elderly and Blind Users.

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Presentation on theme: "Next Generation E-Voting System with Haptic Touchscreen Interface and Voice Feedback for Elderly and Blind Users."— Presentation transcript:

1 Next Generation E-Voting System with Haptic Touchscreen Interface and Voice Feedback for Elderly and Blind Users

2 Agenda  Aim  Block Diagram  Working  ARM Cortex-M3  ARM7 Vs Cortex-M3  LPC1300  QVGA TFT Color Touchscreen Display  Micro-SD Card  FAT-32 EFSL  MP3 Audio Decoder  LPCXpresso  Project Advantage  Software Used  Abbreviations

3 Aim Our project aim is to design a low cost, low power next generation EVM that has a haptic feedback Touchscreen interface coupled with an MP3 quality voice feedback for elderly and visually impaired people.

4 Block Diagram 3.3V 5.0V Power Management circuit Head Phone Haptic Vibrating motor Touch Screen Controller QVGA TFT Color LCD MP3 Audio Codec Micro SD Memory card (2GB) ARM Cortex-M3 PWM SPI-1 SPI-2 SPI-3GPIO 5.0V

5 Working The candidate details and the party symbol are displayed on screen. A 65K Color QVGA TFT Touchscreen LCD is used as the display. A normal person can see the info on screen and touch the party symbol to cast his vote. A haptic feedback module (Mini Vibration Motor) indicates the vote acceptance. For elderly and visually impaired, moving the finger on the screen outputs an audible MP3 quality voice message announcing the candidate name that has been touched. Pressing the position twice/thrice continuously will cause the vote to be accepted and trigger a haptic feedback as well as voice feedback. Picture and Voice files are stored in a FAT-32 formatted 2GB MicroSD memory card. An MP3 decoder chip (has a DSP processor inside) is used to play these voice files. The device is controlled by a 32-bit ARM Cortex-M3 microcontroller that handles the Graphics Library for Touchscreen display, runs EFSL(Embedded File System Library), manages MP3 decoder chip and does all other tasks at significantly low power.

6 ARM Cortex-M3  ARMv7-M Architecture.  Harvard architecture.  Separate I & D buses allow parallel instruction fetching & data storage  3-stage pipeline with branch speculation.  Fetch, Decode & Execute  Integrated bus matrix.  Configurable nested vectored interrupt controller (NVIC).  Advanced debug and trace components (DAP, SWV, ETM).  Wakeup Interrupt Controller (WIC)  Memory Protection Unit (MPU)

7 ARM7 Vs Cortex-M3  High Performance RISC CPU.  Greater performance efficiency, without increasing the frequency or power requirements.  Low power consumption, enabling longer battery life.  Improved code density, ensuring that code fits in even the smallest memory footprints.  Providing easier programmability and debugging.  Wide choice of development tools.  The table here shows older ARM7 Vs Latest ARM Cortex-M3 

8 LPC1300 ARM Cortex-M3 processor, running at frequencies of up to 72 MHz ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC) 32 kB on-chip flash programming memory 8 kB SRAM In-System Programming (ISP) and In-Application Programming (IAP) UART with fractional baud rate generation SSP controller with FIFO and multi-protocol capabilities I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus Up to 42 General Purpose I/O (GPIO) pins Four general purpose counter/timers Programmable WatchDog Timer (WDT) System tick timer Serial Wire Debug and Serial Wire Trace port High-current output driver (20 mA) on one pin High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus Integrated PMU (Power Management Unit) Three reduced power modes: Sleep, Deep-sleep, and Deep power-down Single power supply (2.0 V to 3.6 V) 10-bit ADC with input multiplexing among 8 pins GPIO pins can be used as edge and level sensitive interrupt sources Clock output function with divider Processor wake-up from Deep-sleep mode via a dedicated start logic Brownout detect with four separate thresholds Power-On Reset (POR) Integrated oscillator with an operating range of 1 MHz to 25 MHz 12 MHz internal RC oscillator trimmed to 1 % accuracy Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz System PLL allows CPU operation up to the maximum CPU rate Code Read Protection (CRP) with different security levels Unique device serial number for identification

9 QVGA TFT Color Touchscreen Display TFT LCD  65K Color  320 * 240 Resolution  16-bit RGB format  8-bit Parallel Interface Touchscreen  Digital Resistive Touchscreen  Touchscreen Controller  SPI Interface  Senses Stylus or Finger touch

10 Micro-SD Card Small form factor Non volatile Flash Memory Interfaced via SPI Protocol Maximum data rate is 25Mbps Supports capacity upto 2GB Allows FAT-32 formatting for easy file management Used as mass storage device in portable embedded system Developed by SD Card Association

11 FAT-32 EFSL (FatFs FAT File System for Cortex-M3 and Cortex-M0) Windows compatible FAT-32 file system. Ported to Cortex-M3(LPC1000) Very small footprint for code and work area. Various configuration options: – Multiple volumes (physical drives and partitions). – Long file name support – RTOS support. – Multiple sector size support. – Read-only, minimized API, I/O buffer and etc…

12 MP3 Audio Decoder Decodes multiple formats – MP3 – AAC – WMA – FLAC – Ogg Vorbis – WAV – MIDI SPI Protocol interface EarSpeaker Spatial Processing Volume, Bass and treble controls Low-power operation High-quality on-chip stereo DAC Zero-cross detection for smooth volume change Stereo earphone driver capable of driving a 30­ ohm load Quiet power-on and power-off 16.5 KB on-chip RAM for user code and data

13 LPCXpresso IDE LPCXpresso is a complete toolchain for LPC1000 series of Cortex-M microcontrollers. Eclipse based IDE. GNU Compiler, Linker and Libraries Enhanced GDB Debugger Supports LPC-Link Programmer and Debugger Developed by NxP Semiconductors and CodeRedTechnologies.

14 Project Advantages Replaces the push buttons, LED lights and beep sounds used in current generation Electronic Voting Machines. No need of Braille facility enabled EVM machines. The system is designed around next generation ARM Cortex-M3 microcontroller resulting in a low power, low cost and high security EVM. Modern Touchscreen TFT displays, haptic feedback and MP3 quality voice enhances the user convenience during voting process. Attracts people who are previously reluctant to vote Makes all our country people to exercise their duty without anyone’s assistance

15 Software  Embedded C  Eclipse based LPCXpresso IDE  Cortex-M3 Peripheral Device Drivers  CMSIS from ARM  FAT32-EFSL  Graphics Driver Library

16 Abbreviations  ARM – Advanced RISC Machine  CMSIS – Cortex Microcontroller Software Interface Standard  I2C – Inter Integrated Circuit  SPI – Serial Peripheral Interface  MEMS – Micro Electro Mechanical System / Sensor  DOF – Degree of Freedom  TFT – Thin Film Transistor  QVGA – Quarter VGA  UART – Universal Asynchronous Receiver Transmitter  ADC – Analog to Digital Converter  LCD – Liquid Crystal Display  EFSL – Embedded File System Library  FAT – File Allocation Table

17 Let us work Questions…?


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