1. CMS Drift Tubes Gruppi di Bologna, Padova, Torino G.M. Dallavalle
Incontro con referees INFN
Roma, 9 Maggio 2014

2. DT Collaboration: ~100 p. (50% INFN)
INFN & University of Bologna, ITALY
INFN & University of Padova, & INFN LNL ITALY
INFN & University of Torino, ITALY
CIEMAT, Madrid, SPAIN
RWTH Aachen, GERMANY
Tallinn University, Estonia (since 2011)
University of Malaysia, Kuala Lumpur (since 2014)
ATOMKI, Debrecen, Budabest, Hungary (Alignment)
IFCA Santander, Oviedo. Spain (Alignment)
Also in close collaboration with DT Track Finder (part of CMS LV1 Trigger group):
HEPHY, AUSTRIA -- UAM, SPAIN (until 2013) -- Greece (since 2013)
Incontro con referees INFN
Roma, 9 Maggio 2014

3. DT Chambers (50% INFN, 25% CIEMAT, 25% Aachen)3
DT Chambers (50% INFN, 25% CIEMAT, 25% Aachen)
Located in the CMS barrel, in the five wheels of the magnet return yoke
Sector 4
YB+2
YB+1
YB0
YB-1
YB-2
Sector 5
Sector 3
Sector 6
Sector 2
Sector 7
Sector 1
MB2
MB1
MB3
MB4
Sector 8
Sector 12
Covers 0<η<1.2
Sector 9
Sector 11
Sector 10
250
Drift
chambers
cells
Incontro con referees INFN
Roma, 9 Maggio 2014

4. Superlayer Cell DT Chamber + Minicrate φ coordinate θ coordinate
* It is a wonderful and unique detector:
Although based on drift tubes (drift time of 400 ns), it has proven from the very beginning to provide a robust, efficient, pure trigger with synchronization and timing information with uncertainty below 1 ns.
Incontro con referees INFN
Roma, 9 Maggio 2014

5. DT Electronics (50% INFN, 50% CIEMAT)
to ad-hoc trigger processors
to TDCs
UXC
Sector Collector
Second level of DT read-out and trigger
USC
To DAQ
To Trigger
DTTF
Incontro con referees INFN
Roma, 9 Maggio 2014

6. DT Concerns being addressed for Phase 1
TRB spares: too few for running until LS3
-- old ASIC modules out of production
-- INFN/PD has developed new TRBs using FPGAs
2) Sector Collector location in UXC not optimal:
-- access limitation to the experimental cavern
-- failures have impact on large parts of the detector
-- it can become a risk with the aging of the boards
L1: Increasing threshold not very effective
High Level Trigger (SW)
3) Trigger Track Finder (DTTF)
-- technical reliability
-- poor performance when extrapolating beyond 1034
Incontro con referees INFN
Roma, 9 Maggio 2014

7. DT Electronics for Phase 1
to ad-hoc trigger processors
to TDCs
Sector Collector moved to USC
Second level of DT read-out and trigger
UXC
USC
3500 optical links
To DAQ
To Trigger
DTTF
Incontro con referees INFN
Roma, 9 Maggio 2014

8. Installation of optical fibers for Relocation of SC crate
Modification also important for future upgrades:
single outputs of all 250 chambers available in USC
UXC
USC
Present system
Aachen+Tallinn
LS1 modification
INFN/TO
CIEMAT + INFN/BO
Incontro con referees INFN
Roma, 9 Maggio 2014

9. New TSC (TWINMUX) + new TF
DT Electronics for Phase 1
to ad-hoc trigger processors
to TDCs
Sector Collector moved to USC
Second level of DT read-out and trigger
UXC
USC
New TSC (TWINMUX) + new TF
TWINMUX could have inputs also from RPC and HO. Improve rejection against low Pt.
To DAQ
To Trigger
DTTF
Incontro con referees INFN
Roma, 9 Maggio 2014

10. DT Concerns to be addressed for Phase 2
Minicrates longevity
-- electronics lifetime (1990s ASICs)
-- radiation tolerance (SEU and dose) issues, in particular for trigger boards
2) ReadOut limited to 300KHz
--CMS plans for operating with a trigger rate of up to 1MHz in phase2
3) Trigger Track Finder
-- poor performance when extrapolating at L=5-7*
-- raising threshold not effective due to flattening of rate curve
-- Big improvement when Tracker is used
Muon+tracker 1st level trigger algorithm studies done
Waiting for Tracker layout decision
Incontro con referees INFN
Roma, 9 Maggio 2014

11. High-Resolution TF + tracker matching
DT Electronics for Phase 2
Replace the chamber MCs with:
-- a system of TDCs on the chambers; TDC data continuously transmitted to USC on optical fibers
-- processors in USC that, besides performing high-speed ReadOut operations of the high-resolution TDC data, also generate a muon trigger for CMS directly from the TDC data
UXC
FPGA TDCs
TDCs on chambers
New ROS TWINMUX
USC
High-Resolution TF + tracker matching
Trigger generated directly by processing
TDC data
(as the HLT & offline tracking)
To DAQ
To Trigger
DTTF
Incontro con referees INFN
Roma, 9 Maggio 2014

12. DT phase2 electronics timeline
Project workplan is at a very early stage. However there exist time constraints driven by the LHC schedule:
-- Installation of the new electronics planned for the Long Shutdown LS3 in 2024
--2015/16: study and discuss the overall architecture of the new system, until functionalities and the I/Os of the system macro-components are clearly defined. The system performance will then studied with simulated events in the HL-LHC evironment.
--Until LS2 in 2019/20: Development of the physical components, testing and system prototyping, with the new-minicrate electronics and new USC electronics being developed in parallel.
R&D
phase
/21 until LS3: 4 years construction
Incontro con referees INFN
Roma, 9 Maggio 2014

13. DT phase2 electronics workplan generalities
-- strategy: design based as much as possible on commercial hardware of CMS-wide use.
-- Innovative aspects are in the firmware. In particular for the trigger, that is interest of the INFN groups:
-- A high-performanceTDCs algorithm, to be developed and implemented in radiation tolerant FPGAs, in collaboration with CIEMAT
-- A hit detection and track fitting algorithm for processing the TDC data and generate a trigger primitive, to be developed and implemented in FPGAs.
-- Both developments are high-value Intellectual Properties. Portability allows flexibility among (future) FPGA devices for maximizing integration and perfomance, with advantages on the total cost.
Incontro con referees INFN
Roma, 9 Maggio 2014

14. DT phase2 electronics workplan generalities
-- Although the architecture to be studied in 2015/16, an effort is going in CMS for estimating the total cost of the new DT electronics, based on today’s HW with reasonable extrapolation factors. A first iteration cost table is being scrutinized.
-- the R&D is based on today’s HW. For the trigger R&D of INFN interest, a cost of 250 Keuro can be estimated from the cost of the basic items:
-- Microsemi and Xilinx FPGAs, optical links (GBT components, Versatile links), PCBs fabrication and components assembly (3 different boards will have to be produced, with 2 submissions each), aluminum extrusions, uTCA crates with PS and interface boards, high-end CMS uTCA cards, testing equipment (pattern units).
-- This is ~50% of the total R&D cost, and represents ~4% of the estimated total cost of the Drift-tubes Electronics upgrade for LHC Phase-2.
-- expenditure will start not earlier than 2016, after the study phase, and will cover until LS2 in 2019/20.
Incontro con referees INFN
Roma, 9 Maggio 2014