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Stored Program Concept Learning Objectives Learn the meaning of the stored program concept The processor and its components The fetch-decode-execute and.

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Presentation on theme: "Stored Program Concept Learning Objectives Learn the meaning of the stored program concept The processor and its components The fetch-decode-execute and."— Presentation transcript:

1 Stored Program Concept Learning Objectives Learn the meaning of the stored program concept The processor and its components The fetch-decode-execute and the role of the registers within it Factors affecting processor performance

2 Stored Program concept Computer architectures Stored program concept  Proposed by John von Neumann and Alan Turing  A program must be resident in main memory to be executed  machine code instructions are fetched, one after another, from main memory in sequence and are executed, one at a time in the processor.

3 Stored Program concept Computer architectures Components of the Processor 1)Program Control Unit Fetches program instructions from memory, decodes them and executes them one a time 2) Arithmetic Logic Unit The ALU performs arithmetic and logical operations on data such as addition and subtraction, fixed point and floating point arithmetic, Boolean logic such as AND, OR< XOR and a range of shift operations.

4 Stored Program concept System Clock and Clock Speed  Timing signals that are used to regulate the rate at which instructions are executed  Used to synchronise the operation of various computer components.  Measured in megahertz (MHz) or gigahertz (GHz)  This frequency is known as clock speed.  Instructions required a set amount of clock ticks to execute.  The frequency of these ticks can be increased by frequency multiplying circuits to the rate that is required by the processor.  Clock ticks are provide to regulate the transfer of data, addressed and control signals along the busses at a slower rate than the processor.  Clock speeds double every year. Intel 8088 (1990 – 4.77MHz) 486 DX2 66 – 66Mhz (1994 est) Pentium – Up to 300 Mhz Pentium 4 up to 3-4 GHz Dual Core – Up to 6GHz Quad Core I3,I5,I7.

5 Stored Program concept General Purpose and dedicated registers General Purpose  Fast memory locations used to store data temporarily  Labelled as R1, R2.....Rn  Accessed with instructions such as LOAD, STORE and ADD

6 Stored Program concept General Purpose and dedicated registers Dedicated Registers 1)Stack Pointer (SP) Points to a stack holding return addresses, procedure or functional parameters, and local variables. It is accessed when a procedure or function is called or an interrupt is serviced. 2) Program Counter (PC) Points to the next instruction to be fetched and executed 3) Status Register Holds condition codes to indicate the outcome of operations e.g. Positive, negative, zero, interrupts enabled or overflow. 4) Accumulator (ACC) The result of the current set of calculations

7 Stored Program concept General Purpose and dedicated registers Dedicated Registers 5) Current Instruction register (CIR) Holds the current instruction to be executed while it is decoded and executed 6) Memory Address Register (MAR) Holds the address of the memory location currently being accessed by the processor. 7) Memory Buffer Register (MBR) Holds the data item being transferred to or from the memory location currently being accessed by the processor. Sometimes called the MDR (Memory Data Register)

8 Stored Program concept Computer architectures

9 Stored Program concept Computer architectures Watch the animation on how the Fetch Decode Execute Cycle works

10 Exercise Take the following commands and describe how the Fetch Decode Execute cycle works for each one. 101 LOAD 201 102 SUB 202 103 BRP 107 104 LOAD 201 105 STA 203 106 BRA 109 107 LOAD 202 108 STA 203 109 HLT 201 45 202 34 203 0


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