1. Welcome to the presentation given by Rock group topic of presentation:- pin configuration of 8086 1 st member:-Mithun majumdar 2 nd member:-Gaurav Kumar 3 rd member:-Rohit Dey 4 th member:-Arun Kumar 5 th member:- viki Pin configuration of 8086 page no 1

2. Pin configuration of 8086 page no 2 Pin details of 8086-common to both minimum and maximum mode

3. Pin configuration of 8086 page no 3 1.AD 0 -AD 15 (address data bus):-from pin 2 to 16 2.A 19 /S 6, A 18 /S 5, A 17 /S 4, A 16 /S 3 (address and status lines):-form pin no 35 to 38

4. Pin configuration of 8086 page no 4 3.BHE /S 7 (bus high enable/status):- The pin no is 34. 4.RD (read):-The pin no is 32. 5.READY:-The pin no is 22. 6.INTR(interrupt request):-The pin no is 18

5. Pin configuration of 8086 page no 5 7.TEST :- The pin no is 23. The vector table located in the first 1KB memory space from 00000H to 0003FFH 8.NMI(non-mask able interrupt):-The pin no is 17 9.RESET:- The pin no is 21. 10.CLK(clock):- The pin no is 19.Provides the basic timing to the microprocessor and bus controller

6. Pin configuration of 8086 page no 6 11.MN/MX (minimum/maximum):- The pin no is 33.it indicates in which mode the processor is to operate. 12.V cc :-The pin no is 40. 13.V ss (GND):- The pin are 20 and 1. THANKZZZZZ

7. Pin configuration of 8086 page no 7 NOW ITS REQEST TO MR GAURAV TO REPRESENT HIS TOPIC PIN DETAILS OF 8086- (MINIMUM MODE)

8. Pin configuration of 8086 page no 8 1.M/IO (status signal):- distinguish whether microprocessor is going to access a memory or IO. 2.WR (write):-its indicates that the microprocessor is performing a write operation either from memory or I/O. 3.INTA (interrupt acknowledge):-To response to an interrupt request signal.

9. Pin configuration of 8086 page no 9 4.ALE(address latch enable):-it provide by the processor to latch the address 5.DT/R (data transmit/receive):-control the direction of data flow through the transceiver. 6.DEN (data enable):-it provide as an output enable for 8286/8287 in a minimum system.

10. Pin configuration of 8086 page no 10 7.HOLD(hold request):-this pin is used by external devices to gain control of the buses. 8.HLDA(hold acknowledge):-it indicates that the microprocessor has received the Hold request and that it will relinquish the buses in the next clock cycle.

11. Pin configuration of 8086 page no 11 Now requested to mr Rohit to represent his tropic pin details of 8086 –(Maximum mode)

12. Pin configuration of 8086 page no 12 1.S 2,S 1,S 0 (status):-These three signals are applied to Bus controller 8288 to generate various control signals

13. Pin configuration of 8086 page no 13 2.RQ/GT 0,RQ/GT 1 (I/O REQUEST/GRANT):-these pins are used by other local bus masters to force the processor to release the local bus at end of processor current machine cycle 3.LOCK:-the LOCK signal is activated by the LOCK

14. Pin configuration of 8086 page no 14 4.QS 1,QS 0 (queue status):-it provides status to allow external tracking of the internal 8086 instruction queue.

15. THANK A LOT EVERY ATENDEE