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집적회로설계 1 Spring 2007 Prof. Sang Sik AHN Signal Processing LAB.

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Presentation on theme: "집적회로설계 1 Spring 2007 Prof. Sang Sik AHN Signal Processing LAB."— Presentation transcript:

1 집적회로설계 1 Spring 2007 Prof. Sang Sik AHN Signal Processing LAB

2 CHAPTER 4 Alternative FPGA Architectures

3 Antifuse VS. SRAM New design ideas can be quickly implemented and tested by SRAM-based devices SRAM-based devices is that they have to be reconfigured every time the system is powered up SRAM-based devices is difficult to protect your intellectual property (Weak at Reverse Eng.) Bit stream encryption via JTAG

4 Antifuse VS. SRAM Antifuse-based devices are programmed off-line using a special device programmer Nonvolatile SRAM-based component can be “flipped” if that cell is hit by radiation Military and aerospace applications Almost impossible to reverse-engineer Advantages relating to power consumption and speed

5

6 FPGA Fabric

7 Mux-based Logic Block

8 Look-Up Table (LUT)-based Logic Block

9 Configuration Cells Linked in a Chain

10 A Multifaceted LUT

11 Logic Cell

12 Slice

13 Configurable Logic Block (CLB)

14 A Multifaceted CLB

15 Embedded RAMS Each block of RAM can be used independently, or multiple blocks can be combined together Implementing standard single- or dual-port RAMs First-in first-out (FIFO) State machines

16 Embedded Multipliers Slow if they are implemented by connecting a large number of programmable logic blocks together Hardwired multiplier has better performance

17 Embedded Multiplier Adder Accumulator (MAC)

18 Embedded Processor Cores

19

20 Clock Trees

21 Jitters

22 Clock Managers

23 Frequency Synthesis

24 Phase Shift

25 De-skewing

26 Configurable I/O Impedance

27 Core versus I/O Supply Voltages

28 Traditional Bus

29 Gigabit Transceiver


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