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MIPS Microarchitecture Single-Cycle Processor Control

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Presentation on theme: "MIPS Microarchitecture Single-Cycle Processor Control"— Presentation transcript:

1 MIPS Microarchitecture Single-Cycle Processor Control
Lecture 18 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007

2 Review: Single-Cycle Datapath

3 Review: ALU F2:0 Function 000 A & B 001 A | B 010 A + B 011 not used
100 101 A | ~B 110 A - B 111 SLT

4 Review: ALU

5 Single-Cycle Control

6 Single-Cycle Control

7 Single-Cycle Control

8 Single-Cycle Control

9 Control Units

10 Control Units: ALU Decoder
ALUOp Meaning 00 Add 01 Subtract 10 Look at funct 11 Not Used ALUOp Funct ALUControl 00 X 010 (Add) X1 110 (Subtract) 1X (add) (sub) (and) 000 (And) (or) 001 (Or) (slt) 111 (SLT)

11 Control Units: Main Decoder
Instruction Op5:0 RegWrite RegDst AluSrc Branch MemWrite MemtoReg ALUOp1:0 R-type 000000 lw 100011 sw 101011 beq 000100

12 Extended Functionality: addi

13 Extended Functionality: j

14 Performance How fast is the single-cycle processor?

15 Performance

16 Next Time Multicycle processor

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