1. ENG241 Digital Design Week #5 Arithmetic Circuits

2. 2Topics  Binary Adders  Binary Ripple Carry Adder  1’s and 2’s Complement  Binary Subtraction  Binary Adder-Subtractors  Binary Multipliers  BCD Arithmetic

3. 3Resources  Chapter #5, Mano Sections 5.2 Binary Adders 5.3 Binary Subtraction 5.4 Binary Adders-Subtractors 5.5 Binary Multiplications 5.7 HDL Representations -- VHDL

4. 4 Recall: Arithmetic -- addition Binary addition is similar to decimal arithmetic +10001 00110 11101 No carries 101100 10110 +10111 101101 Carries Remember: 1+1 is 2 (or (10) 2 ), which results in a carry 1+1+1 is 3 (or (11) 2 ) which also results in a carry

5. 5 Half Adder (One bit adder) o S = XY’ + X’Y = X  Y o C = X.Y

6. 6 Full Adder o Three inputs:  X  Y  Third is C in  Z o Two outputs:  Sum  C out S Full Adder xy ZC out Implementation?

7. 7 Straight Forward Implementation:  What is this? Z S K Map for S

8. 8 Y X Z Y Z X C Straight Forward Implementation: K Map for C

9. 9 Implementation Issues how many gates o If we try to implement the Optimized Boolean functions directly we will need how many gates?  Seven AND gates and two OR Gates!! o Can we do better? o YES!!  Share Logic  Hierarchical Design.

10. 10 Any Alternatives? o Try to make use of hierarchy to design a 1-bit full adder from two half adders. o Also, try to share logic between the Sum output and Carry output.  Half Adder S = X  Y C = XY  Full Adder S = X  Y  Z C = XY + XZ + YZ

11. 11 A Different Way to Represent C 1 1 1 1 X YZ 0 1 00011110 XY XYZ C = XY + XYZ + XYZ C = XY + Z (XY + XY)

12. 12 Two Half Adders (and an OR) How many Gates do we need? Full Adder xy ZC S

13. 13 Binary Ripple-Carry Adder  A Parallel binary adder is a digital circuit that produces the arithmetic sum of two binary numbers using only combinational logic.  The parallel adder uses “n” full adders in parallel, with all input bits applied simultaneously to produce the sum.  The full adders are connected in cascade, with the carry output from one full adder connected to the carry input of the next full adder.

14. 14 Binary Ripple-Carry Adder  Straightforward – connect full adders  Carry-out to carry-in chain C 0 in case this is part of larger chain, maybe just set to zero

15. 15 Hierarchical 4-Bit Adder We can easily use hierarchy here 1. Design half adder 2. Use TWO half adders to create full adder 3. Use FOUR full adders to create 4-bit adder VHDL CODE?

16. 16 VHDL Half Adder (DATA FLOW) entity half_adder is port (x,y: in std_logic; s,c: out std_logic); end half_adder; architecture dataflow of half_adder is begin s <= x xor y; c <= x and y; end dataflow

17. 17 VHDL Full Adder (Structural) entity full_adder is port (x, y, z: in std_logic; s, c: out std_logic); end full_adder; architecture struc_dataflow of full_adder is hs hc tc component half_adder port (x, y : in std_logic; s, c : out std_logic); end component; signal hs, hc, tc: std_logic; begin HA1: half_adder port map (x, y, hs, hc); HA2: half_adder port map (hs, z, s, tc); c <= tc or hc; end struc_dataflow

18. 18 Any Problems with this Design?  Delay Approx how much?  Imagine a 64-bit adder Look at carry chain

19. 19 Carry Propagation & Delay  One problem with the addition of binary numbers is the length of time to propagate the ripple carry from the least significant bit to the most significant bit.  The gate-level propagation path for a 4-bit ripple carry adder of the last example:  Note: The "long path" is from A 0 or B 0 through the circuit to S 3.

20. 20 BCD Addition One decimal digit + one decimal digit ●I●If the result is 1 decimal digit ( ≤ 9 ), then it is a simple binary addition Example: ●I●If the result is two decimal digits ( ≥ 10 ), then binary addition gives invalid combinations Example: 5 + 3 8 0 1 + 0 0 1 1 1 0 0 0 5 + 5 1 0 0 1 + 0 1 0 1 1 0 0 0 0 1 0 0 0 0

21. 21 BCD Addition If the binary result is greater than 9, correct the result by adding a “6” 5 + 5 1 0 0 1 + 0 1 0 1 1 0 + 0 1 1 0 0 0 0 1 0 0 0 0 Two Decimal Digits Multiple Decimal Digits 3 5 1 0 0 1 10 1 0 0 0 1

22. ENG241/Digital Design22 BCD Arithmetic 81000Eight +5+0101Plus Five 131101is 13 (> 9)  Note that the result is MORE THAN 9, so must be represented by two digits!  To correct the digit, add 6 1000 Eight 8 +5 +0101 Plus 5 13 1101 is 13 (> 9) +0110 so add 6 carry = 1 0011 leaving 3 + cy 0001 | 0011 Final answer (two digits) 22

23. 23 BCD Addition Circuit  Design a BCD Adder that adds two BCD digits.  Constraints: Use 4-bit Binary Adders  Hints: A detection circuit that detects invalid BCD digits will need to be designed.

24. ENG241/Digital Design24 BCD Addition 4-bit binary adder Addend Augend Input Carry 4-bit binary adder BCD Sum 0 or 6 Detection Circuit for Invalid BCD Output Carry 24

25. 25 BCD Addition 1010 1011 1100 1101 1110 1111 Z 3 Z 2 Z 1 Z 0

26. Subtraction  We managed to design an Adder easily. Subtractor  For subtraction, we will also need to design a Subtractor!!  Can we perform subtraction using the Adder Circuit we designed earlier?  YES, we can use the concept of Complements. X = Y – Z  X = Y + complement(Z) 26

27. Complements? two types of complements  There are two types of complements for each base-r system The radix complement, the (r’s) complement. The diminished radix complement, (r-1)’s comp.  For Decimal System 10’s complement 9’s complement  For Binary Systems 2’s complement 1’s complement 27

28. Complements of Decimal System  The 9’s complement of a decimal number is obtained by subtracting each digit from 9. Example: The 9’s complement of 546700 is 999999 – 546700 = 453299  The 10’s complement is obtained by adding 1 to the 9’s complement: Example: The 10’s complement of 546700 is 999999 – 546700 = 453299 + 1 = 453300 Or, 1000000 – 546700 = 453300 Or, leave all least significant 0’s unchanged, subtract the first nonzero LSD from 10, and subtract all higher significant digits from 9. 28

29. Unsigned Decimal Subtraction 72532 – 3250 = 69282  Use 10’s complement to perform the subtraction  M = 72532 (5-digits), N = 3250 (4-digits) Since N has only 4 digits append a zero N=03250 What is the 10’s complement of N (03250)? + 1  99999 – 03250 = 96749 + 1 = 96750 Now add Now add M to the 10’s comp of N  72532 + 96750 = 169282 (carry occurred) The occurrence of the end carry indicates that M > N Discard end carry (169282 – 100000 = 69282) 29 Example #1

30. 3250 - 72532 = - 69282 (HOW??) Compare the numbers, exchange their positions, …  Use 10’s complement to perform the subtraction  M = 3250 (4-digits), N = 72532 (5-digits) Since M has only 4 digits append a zero M=03250 What is the 10’s complement of N (72532)?  99999+ 1  99999 – 72532 = 27467 + 1 = 27468 Now add Now add M to the 10’s comp of N  03250 + 27468 = 30718 (There is no end carry!) No end carry indicates that M < N (make correction!!) Answer: -(10’s complement of 30718) = -69282 30 Unsigned Decimal Subtraction Example #2

31. 31 Binary Subtraction We’ll use unsigned subtraction to motivate use of complemented representation

32. 32 1’s Complement 11 ’s Complement (Diminished Radix Complement) ●A●All ‘0’s become ‘1’s ●A●All ‘1’s become ‘0’s Example (10110000) 2  (01001111) 2 If you add a number and its 1’s complement …??? 1 0 1 1 0 0 0 0 + 0 1 0 0 1 1 1 1 1 1 1 1

33. 33 1’s Complement: Example 10101010 Notice that the 1’s complement of the number 10101010 can be obtained by complementing each bit 2 n - 11111111 - N0101010 1’s Compl.1010101 1 0 1 0 0 1 0 1

34. 34 2’s Complement 22 ’s Complement (Radix Complement) ●T●Take 1’s complement then add 1 ●T●Toggle all bits to the left of the first ‘1’ from the right Example: Number: 1’s Comp.: 0 1 0 1 0 0 0 0 1 0 1 1 0 0 0 0 0 1 0 0 1 1 1 1 + 1 OR 1 0 1 1 0 0 0 0 00001010

35. 35 2’s Complement: Example complementingadding Notice that the 2’s complement of the number 011001 can be obtained by complementing each bit and adding 1. 2n2n 1000000 - N011001 1’s Comp100110 2’s Compl.100111

36. 36 Example: Incorrect Result Borrow11100 (M) Minuend100 11 (N) Subtrahend -11110 Difference10101 19 – 30 = 21 !!!!! Incorrect Result!! Minuend is smaller than Subtrahend How can we know if the result is incorrect? How to fix the problem?

37. 37Example Borrow11100 (M) Minuend100 11 (N) Subtrahend -11110 Difference10101 Correct Diff -01011 If no borrow, then result is non-negative (minuend >= subtrahend). Since there is borrow, result must be negative. The result must be corrected to a negative number. 19 – 30 = -11 Procedure?

38. 38 Algorithm: Subtraction of two n-digit Numbers M-N can be done as follows 1. Subtract N from M If no borrow, then M  N and result is OK ! Otherwise, N > M so result must be subtracted from 2 n and a minus sign should be appended 2. NOTE: Subtraction of a binary number from 2 n to obtain an n-digit result is called 2’s complement 3. Circuit?

39. 39 Adder/Subtractor Circuit!! Adder/Subtractor Circuit!! Binary Adder Binary Subtractor EXPENSIVE!!

40. 40 How to get rid of Subtraction Operation? Use complements of numbers to replace the subtraction operation with addition only. Any Idea?

41. 41 Subtraction of Unsigned Numbers Using Complements 1. M – N Equivalent to M + (2’s complement of N) 2. Add (2’s complement of N) to M This is M + (2 n – N) = M – N + 2 n Notice we are using addition to achieve subtraction. will generate 3. If M  N, will generate carry! Result is correct  Simply discard carry Result is positive M - N no end carry 4. If M < N, no end carry will be generated! Make Correction  Take 2’s complement of result Place minus sign in front

42. 42 Example o X = 1010100 minus Y = 1000011 o Notice that X > Y o The 2’s complement of Y=1000011 is obtained first by getting the 1’s complement  0111100 and then adding 1  (0111101) X1010100 + 2’s comp Y0111101 Sum10010001

43. 43 Example 2  Y = 1000011 minus X = 1010100  Notice Y < X  No end carry  Answer: - (2’s complement of Sum)  - 0010001 Y1000011 + 2’s comp X0101100 Sum 1101111 We said numbers are unsigned. What does this mean?

44. 44Adder-Subtractor I. By using 2’s complement approach we were able to get rid of the design of a subtractor. II. Need only adder and complementer for input to subtract III. Need selective complementer to make negative output back from 2’s complement

45. 45 Selective 1’s Complementer? Control When X = 0 we transfer Y to output When X = 1 we complement Y

46. 46Design Inverts each bit of B if S is 1 Adds 1 to make 2’s complement S low for add, high for subtract

47. 47 Negative Numbers CC omputers Represent Information in ‘0’s and ‘1’s ●‘●‘+’ and ‘−’ signs have to be represented in ‘0’s and ‘1’s 33 Systems ●S●Signed Magnitude ●1●1’s Complement ●2●2’s Complement All three use the left-most bit to represent the sign: ♦‘♦‘ 0’  positive ♦‘♦‘ 1’  negative

48. 48 Signed Binary Numbers  First review signed representations  Signed magnitude Left bit is sign, 0 positive, 1 negative Other bits are number 0 0001001  +9 1 0001001  -9  2’s complement  1’s complement

49. 49 Signed Magnitude Representation MM agnitude is magnitude, does not change with sign (+3) 10  ( 0 0 1 1 ) 2 (−3) 10  ( 1 0 1 1 ) 2 SignMagnitude SMagnitude (Binary)

50. 50 1’s Complement Representation PP ositive numbers are represented in “Binary” NN egative numbers are represented in “1’s Comp.” (+3) 10  (0 011) 2 (−3) 10  (1 100) 2 TT here are 2 representations for ‘0’!!!!!! (+0) 10  (0 000) 2 (−0) 10  (1 111) 2 0Magnitude (Binary) 1Code (1’s Comp.)

51. 51 1’s Complement Range  4-Bit Representation 2 4 = 16 Combinations − 7 ≤ Number ≤ + 7 −2 3 +1 ≤ Number ≤ +2 3 − 1  n-Bit Representation −2 n−1 +1 ≤ Number ≤ +2 n−1 − 1 Decimal1’s Comp. + 70 1 1 1 + 60 1 1 0 + 50 1 + 40 1 0 0 + 30 0 1 1 + 20 0 1 0 + 10 0 0 1 + 00 0 − 01 1 − 11 1 1 0 − 21 1 0 1 − 31 1 0 0 − 41 0 1 1 − 51 0 − 61 0 0 1 − 71 0 0 0

52. 52 2’s Complement Representation PP ositive numbers are represented in “Binary” NN egative numbers are represented in “2’s Comp.” (+3) 10  (0 011) 2 (−3) 10  (1 101) 2 TT here is 1 representation for ‘0’ (+0) 10  (0 000) 2 (−0) 10  (0 000) 2 0Magnitude (Binary) 1Code (2’s Comp.) 1’s Comp. 1 1 1 1 + 1 1 0 0 0 0

53. 53 2’s Complement Range  4-Bit Representation 2 4 = 16 Combinations − 8 ≤ Number ≤ + 7 −2 3 ≤ Number ≤ + 2 3 − 1  n-Bit Representation −2 n−1 ≤ Number ≤ + 2 n−1 − 1 Decimal2’s Comp. + 70 1 1 1 + 60 1 1 0 + 50 1 + 40 1 0 0 + 30 0 1 1 + 20 0 1 0 + 10 0 0 1 + 00 0 − 11 1 − 21 1 1 0 − 31 1 0 1 − 41 1 0 0 − 51 0 1 1 − 61 0 − 71 0 0 1 − 81 0 0 0

54. 54 Convert 2’s Complement to Decimal bit index 7 6 5 4 3 2 1 0 bit weighting -2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 Example 0 1 0 1 0 0 1 0 Decimal 0x-2 7 1x2 6 0x2 5 1x2 4 0x2 3 0x2 2 1x2 1 0x2 0 64 + 16 + 2 = 82 bit index 7 6 5 4 3 2 1 0 bit weighting -2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 Example 1 0 1 0 1 1 1 0 Decimal 1 x-2 7 0x2 6 1x2 5 0x2 4 1x2 3 1x2 2 1x2 1 0x2 0 -128 + 32 + 8 + 4 + 2 = -82

55. 55 Number Representations  4-Bit Example Unsigned Binary Signed Magnitude 1’s Comp.2’s Comp. Range0 ≤ N ≤ 15-7 ≤ N ≤ +7 -8 ≤ N ≤ +7 Positive Binary Negative X Binary1’s Comp.2’s Comp. 000111

56. 56 Example in 8-bit byte  Represent +9 in different ways Signed magnitude00001001 1’s Complement00001001 2’s Complement00001001  Represent -9 in different ways Signed magnitude10001001 1’s Complement11110110 2’s Complement11110111 The Same!

57. 57Observations  All positive numbers are the same  1’s Comp and Signed Mag have two zeros  2’s Comp has more negative than positive  All negative numbers have 1 in high-order bit

58. 58 Advantages/Disadvantages  Signed magnitude has problem that we need to correct after subtraction  One’s complement has a positive and negative zero Two’s complement is most popular i.e arithmetic operations are easy

59. 59 Signed Magnitude Representation MM agnitude is magnitude, does not change with sign (+3) 10  ( 0 0 1 1 ) 2 (−3) 10  ( 1 0 1 1 ) 2 CC an’t include the sign bit in ‘Addition’ 0 0 1 1  (+3) 10 + 1 0 1 1  (−3) 10 1 1 1 0  (−6) 10 SignMagnitude SMagnitude (Binary)

60. 60 Signed Magnitude Representation  The signed-magnitude system is used in ordinary arithmetic, but is awkward when employed in computer arithmetic (Why?) 1. We have to separately handle the sign 2. Perform the correction if necessary!!  Therefore the signed complement (1’s complement and 2’s complement number representations) is normally used.

61. 61 Signed Magnitude Arithmetic  Complex Rules!!  The addition of two numbers M+N in the sign magnitude system follows the rules of ordinary arithmetic: signs are the same If the signs are the same, we add the two magnitudes and give the sum the sign of M. signs are different If the signs are different, we subtract the magnitude of N from the magnitude of M. end borrow The absence or presence of an end borrow then determines:  The sign of the result.  Whether or not a correction is performed. Example: (0 0011001) + (1 0100101)  0011001 – 0100101 = 1110100  End borrow of 1 occurs,  M < N!!  Sign of result should be that of N,  Also correct result by taking the 2’s complement of result

62. 62 Binary Subtraction Using 1’s Comp. Addition CC hange “Subtraction” to “Addition” II f “Carry” = 1 then add it to the LSB, and the result is positive (in Binary) II f “Carry” = 0 then the result is negative (in 1’s Comp.) 0 1 + 1 1 1 0 (5) 10 – (1) 10 (+5) 10 + (-1) 10 0 0 1 1 + 0 1 0 0 0 1 + 1 0 0 1 (5) 10 – (6) 10 (+5) 10 + (-6) 10 0 1 1 1 0 1 1 1 0 + 4− 1 1

63. 63 Two’s Complement  To Add: Easy Easy on any combination of positive and negative numbers  To subtract: Also easy Also easy! 2’s complement Take 2’s complement of subtrahend Add Add This performs A + ( -B), same as A – B

64. 64 Binary Subtraction Using 2’s Comp. Addition CC hange “Subtraction” to “Addition” II f “Carry” = 1 ignore it, and the result is positive (in Binary) II f “Carry” = 0 then the result is negative (in 2’s Comp.) 0 1 + 1 1 1 1 (5) 10 – (1) 10 (+5) 10 + (-1) 10 1 0 1 0 0 0 1 + 1 0 1 0 (5) 10 – (6) 10 (+5) 10 + (-6) 10 0 1 1 1 1 + 4 − 1

65. 65 Examples from Book  Addition (+6) + 13 (-6) + 13 (+6) + (- 13) (-6) + (-13)  Subtraction (-6) - (-13) (+6) - (-13) The numbers below should be in 2’s comp representation

66. 66 Addition of Two Positive Numbers  Addition (+6) + 13 = +19 00000110  +6 +00001101  +13 -------------- 00010011  +19  If a carry out appears it should be discarded.

67. 67 Addition of : a Positive and Negative Numbers  Addition (-6) + 13 = +7 11111010 (this is 2’s comp of +6) +00001101 -------------- 1 00000111  The carry out was discarded

68. 68 Subtraction of Two Numbers subtraction  The subtraction of two signed binary numbers (when negative numbers are in 2’s complement form) can be accomplished as follows: 1. Take the 2’s complement of the subtrahend (including the sign bit) 2. Add it to the minuend. 3. A Carry out of the sign bit position is discarded.

69. 69 Subtraction of Two Numbers  Subtraction (+6) – (+13) = -7 00000110 00000110 - 00001101  + 11110011 (2’s comp) -------------- ----------- 11111001  What is 11111001? Take its 2’s complement=> 00000111 The magnitude is 7 So it must be -7

70. 70 Circuit for 2’s complement Numbers  No Correction is needed if the signed numbers are in 2’s complement representation

71. 71 Sign Extension  Sign extension is the operation, in computer arithmetic, of increasing the number of bits of a binary number while preserving the number’s sign (positive/negative) and value.  This is done by appending digits to the most significant side of the number  Examples:  2’s complement (6-bits  8-bits) 00 1010  0000 1010  2’s complement (5-bits  8-bits): 10001  1111 0001

72. 72 Overflow sufficient  In order to obtain a correct answer when adding and subtracting, we must ensure that the result has a sufficient number of bits to accommodate the sum.  If we start with two n-bit numbers and we end up with a number that is n+1 bits, we say an overflow has occurred.

73. 73 Overflow  Two cases of overflow for addition of signed numbers Two large positive numbers overflow into sign bit  Not enough room for result Two large negative numbers added  Same – not enough bits  Carry out can be OK

74. 74Examples 8-bit registers  Two signed numbers +70 and +80 are stored in 8-bit registers.  The range  The range of binary numbers, expressed in decimal, that each register can accommodate is from +127 to -128.  Since the sum of the two stored numbers is 150, it exceeds the capacity of an 8-bit register.  The same applies for -70 and -80.

75. 75 Overflow Detection Carries: 0 1 Carries: 1 0 +70 0 1000110 -70 1 0111010 +80 0 1010000 -80 1 0110000 ------ ------------- ---- ------------- +150 1 0010110 -150 0 1101010 1. The addition of +70 and +80 resulted in a negative number! 2. The addition of -70 and -80 also resulted in an incorrect value which is positive number! 3. An overflow condition can be detected by observing the carry into the sign bit position and the carry out of the sign bit position. 4. If the the carry in and carry out of the sign bit are not equal an overflow has occurred.

76. 76 Circuit for Overflow Detection Condition is that either C n-1 or C n is high, but not both

77. 77 Recall: Arithmetic -- multiplication 1011 0000 1011 110111 1011 X 101

78. 78 Multiplier  Multiply by doing single-bit multiplies and shifts  Combinational circuit to accomplish this?

79. 79 Combinational Multiplier AND computes A 0 B 0 Half adder computes sum. Will need FA for larger multiplier.

80. 80 Larger Multiplier: Resources For J multiplier bits and K multiplicand bits we need o J x K  AND gates o (J-1) K-bit  adders to produce a product of J+K bits.

81. 81 Larger Multiplier A k=4-bit by j=3-bit Binary Multiplier. J = 3 K = 4 Jxk = 12 AND Gates (J-1) Adders Of k bits each

83. 83 Carry Look ahead Adder  Note that add itself just 2 level  Idea is to separate carry from adder function Then make carry approx 2-level all way across larger adder

84. 84 One-bit Subtractor  Inputs:  Borrow in,  minuend  subtrahend  Outputs: Difference, borrow out  Truth Table? 1-bit sub MS B out D B in

85. 85 Correcting Result Borrow11100 Minuend100 11 Subtrahend -11110 Difference10101 0 1 0 1 1 1 0 0 0 0 0 - 1 0 1 0 1

86. 86 Correcting Result  If M is minuend and N subtrahend of numbers length n, difference was (2 n + M) – N  What we want is magnitude of N-M with minus sign in front  We can get the correct result by subtracting previous result from 2 n N - M = 2 n – (M – N + 2 n )

87. 87 Interpretation of the incorrect result Borrow11100 Minuend100 11 Subtrahend -11110 Difference10101 1 0 0 0 0 0 + 1 0 0 1 1 - 1 1 1 1 0 1 0 1 0 1 M N 2525 (2 n + M) – N

88. 88 Correcting Result  What, mathematically, does it mean to borrow?  It means that M < N  If borrowing at digit i-1 you are adding 2 i

89. 89 Designs Aren’t Like This  That’s why people use complemented interpretation for signed numbers 2’s complement 1’s complement

90. 90 2’s Complement The 2’s complement of 10101 is 01011 1 0 0 0 0 0 - 1 0 1 0 1 0 1 0 1 1 The circuit that performs this is a complementer

91. 91 1’s Complement  Given: binary number N with n digits  1’s complement defined as (2 n – 1) - N  Note that (2 n – 1) is number with n digits, all of them 1 For n = 4, (2 n – 1) = 1111

92. 92 2’s Complement  Given: binary number N with n digits  2’s complement defined as 2 n – N for N  0 0 for N = 0  Exception is so that the result will always have n bits  2’s complement is just a 1 added to 1’s complement

93. 93 Still Remember? Unsigned Arithmetic Subtraction 10110 -10010 00100 No borrows 11110 -10011 Borrows 0 - 1 results in a borrow 11 11 0 0 0 1 0 Subtrahend Minuend

94. 94 Four-bit Carry Look Ahead Adder function separated from carry Notice adder has A, B, C in and S out, as well as G,P out. Reference

95. ENG241/Digital Design95 BCD Addition 95