Presentation is loading. Please wait.

Presentation is loading. Please wait.

NetFPGA Environment Prepared by Van Quoc Dung. Agency Way to connect to server Subversion control Xilinx development environment Testing problem.

Similar presentations


Presentation on theme: "NetFPGA Environment Prepared by Van Quoc Dung. Agency Way to connect to server Subversion control Xilinx development environment Testing problem."— Presentation transcript:

1 NetFPGA Environment Prepared by Van Quoc Dung

2 Agency Way to connect to server Subversion control Xilinx development environment Testing problem

3 Connecting to server … 2 ways to connect ◦ From: Linux  ssh -XC netfpga@172.28.11.155 ◦ From: Window  Using Putty + Xming  Putty: enable forward X11 (SSH – X11 tab)  Xming: handle GUI (Xming font + Xming)

4 Subversion control Why using??? Easily control project version Check out projects ◦ svn co svn+ssh://netfpga@172.28.11.155/projects/NIDS Check status svn status Add file to prepare check in ◦ svn add fileA fileB … Check in status ◦ svn ci –m ‘Message telling how your code is changed’

5 Xilinx development Xilinx Flow Synthesis NGDbuild MAP Place and Route Bitgen NDC NGD NCD & PCF NCD Verilog Compile & Simulation

6 Xilinx development Development Approach ◦ Interactive Gui  ISE  PlanAhead ◦ Command Line  For large project -> increase productivity  Dedicated server -> some ocassions not support GUI  Resource utilization

7 Xilinx development Command Line Mode ◦ Scripting Language:  Perl  TCL  Unix bash ◦ Build Flow Approach:  Direct Invocation  XFLOW  XTCLSH  PlanAhead

8 Xilinx development Using Perl and invoke direct command from ISE command ◦ xst –ifn nf2_top.prj –ofn nf2_top.ngc ◦ ngdbuild –p xv2p50-ff1152-7 “nf2_top.ngc” ◦ map … ◦ Par … ◦ Bitgen … Integrated to netfpga.pl perl file

9 Xilinx development Using netfpga.pl ◦ netfpga.pl -clear // clear all unnecessary files ◦ netfpga.pl -core // generate IP from xco files ◦ netfpga.pl -syn // synthesize projects ISE ◦ netfpga.pl –syn -top nf2_top // synthesize projects without ISE created ◦ netfpga.pl –bit –top nf2_top // generate bit file ◦ netfpga.pl –sim –top debug // simulation Note: Type command in project directory. Make sure that you turn on the TMAC license

10 Xilinx development Some other command tool need deploy ◦ Data2mem: change value of Bram in Bit file ◦ Mem_edit: edit memory

11 Testing problem NIC in Board Send directly out to port, no need TCP/IP mechanism NIC out

12 Testing problem Switch Networking Traffic Board Need operate like an NIC ARP, TCP, UDP

13 Testing problem Switch Networking Traffic Board Not need operate like an NIC, but 1 – Board send random packet so that switch can cache the MAC add 2 – Network Traffic is generate by autotool which indentifies Board MAC add


Download ppt "NetFPGA Environment Prepared by Van Quoc Dung. Agency Way to connect to server Subversion control Xilinx development environment Testing problem."

Similar presentations


Ads by Google