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Chapter 5 Transistor bias circuits Ir. Dr. Rosemizi Abd Rahim 1 Ref: Electronic Devices and Circuit Theory, 10/e, Robert L. Boylestad and Louis Nashelsky.

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Presentation on theme: "Chapter 5 Transistor bias circuits Ir. Dr. Rosemizi Abd Rahim 1 Ref: Electronic Devices and Circuit Theory, 10/e, Robert L. Boylestad and Louis Nashelsky."— Presentation transcript:

1 Chapter 5 Transistor bias circuits Ir. Dr. Rosemizi Abd Rahim 1 Ref: Electronic Devices and Circuit Theory, 10/e, Robert L. Boylestad and Louis Nashelsky

2 Objectives ● Discuss the concept of dc biasing of a transistor for linear operation ● Analyze voltage-divider bias, base bias, emitter bias and collector-feedback bias circuits. 2

3 Biasing Biasing:The DC voltages applied to a transistor in order to turn it on so that it can amplify the AC signal. 3

4 Operating Point The DC input establishes an operating or quiescent point called the Q- point. 4

5 The Three States of Operation Active or Linear Region Operation Base–Emitter junction is forward biased Base– Collector junction is reverse biased Cutoff Region Operation Base–Emitter junction is reverse biased Saturation Region Operation Base–Emitter junction is forward biased Base– Collector junction is forward biased 5

6 DC Biasing Circuits Fixed-bias circuit Emitter-stabilized bias circuit Collector-emitter loop Voltage divider bias circuit DC bias with voltage feedback 6

7 Fixed Bias 7

8 The Base - Emitter Loop From Kirchhoff’s voltage law: +V CC – I B R B – V BE = 0 Solving for base current : B  V BE V CC R I B  8

9 Collector-Emitter Loop Collector current: I   I B C From Kirchhoff’s voltage law: V CE  V CC  I C R C 9

10 Saturation When the transistor is operating in saturation, current through the transistor is at its maximum possible value. V CC I Csat  R CR C V CE  0 V 10

11 Load Line Analysis The end points of the load line are: I Csat I C = V CC / R C V CE = 0 V V CEcutoff V CE = V CC I C = 0 mA The Q-point is the operating point: where the value of R B sets the value of I B that sets the values of V CE and I C 11

12 Circuit Values Affect the Q-Point 12

13 Circuit Values Affect the Q-Point 13

14 Circuit Values Affect the Q-Point 14

15 Emitter-Stabilized Bias Circuit Adding a resistor (R E ) to the emitter circuit stabilizes the bias circuit. 15

16 Base-Emitter Loop From Kirchhoff’s voltage law:  V CC - I E R E - V BE - I E R E  0 Since I E = (  + 1)I B : V CC - I B R B - (   1)I B R E  0 Solving for I B : EB V CC - V BE  (   1)R I B  R 16

17 Collector-Emitter Loop From Kirchhoff’s voltage law: CECCCC IR V 0IR V 0I E R E  V SinceI E  I C : V CE  V CC – I C (R C  R E ) Also: V E  I E R E V C  V CE  V E  V CC - I C R C V B  V CC – I R R B  V BE  V E 17

18 Improved Biased Stability Stability refers to a circuit condition in which the currents and voltages will remain fairly constant over a wide range of temperatures and transistor Beta (  ) values. Adding RE to the emitter improves the stability of a transistor. 18

19 Saturation Level The endpoints can be determined from the load line. V CEcutoff :I Csat : V CE  V CC I C  0 mA V CC R C  R IC IC  V CE  0 V 19

20 Voltage Divider Bias This is a very stable bias circuit. The currents and voltages are nearly independent of any variations in . 20

21 Approximate Analysis Where I B << I 1 and I 1  I 2 : 21 B R RR R R 2 V CC V  Where  R E > 10R 2 : I  VE VE E E R V E  V B  V BE From Kirchhoff’s voltage law: V CE  V CC  I C R C  I E R E I E  I C V CE  V CC  I C (R C  R E ) 21

22 Voltage Divider Bias Analysis Transistor Saturation Level V CC I EC  I Cmax  Csat R RR R Load Line Analysis Cutoff: Saturation: V CE  V CC I C  0mA CE V CC R C  R E V  0V IC IC  22

23 DC Bias with Voltage Feedback Another way to improve the stability of a bias circuit is to add a feedback path from collector to base. In this bias circuit the Q- point is only slightly dependent on the transistor beta, . 23

24 Base-Emitter Loop From Kirchhoff’s voltage law: V CC – I C R C – I B R B – V BE – I E R E  0 Where I B << I C : C I'  I C  I B  I C Knowing I C =  I B and I E  I C, the loop equation becomes: V CC –  I B R C  I B R B  V BE   I B R E  0 Solving for I B : R B   (R C  R E ) V CC  V BE IB IB  24

25 Collector-Emitter Loop Applying Kirchoff’s voltage law: I E + V CE + I ’ C R C – V CC = 0 Since I  C  I C and I C =  I B : I C (R C + RE ) + V CE – V CC =0 Solving for V CE : V CE = V CC – I C (R C + R E ) 25

26 Base-Emitter Bias Analysis Transistor Saturation Level EC Csat V CC I R RR R  I Cmax  Load Line Analysis Cutoff: Saturation: V  V CC V CE I C  0 mA EC C I V CE  0 V R RR R  CC 26

27 PNP Transistors The analysis for pnp transistor biasing circuits is the same as that for npn transistor circuits. The only difference is that the currents are flowing in the opposite direction. 27

28 Base voltage Emitter voltage By Ohm’s Law, And, Analysis of Voltage Bias for PNP Transistor 28

29 Evaluate IC and VEC for pnp transistor circuit in Figure below. Given VEE = +15V, R1 = 63kΩ, R2 = 27kΩ, RC = 1.8kΩ, RE = 2.6kΩ, βDC =120. Example 1 29

30 Figure below shown the schematic with a negative supply voltage, determine IC and VCE for a pnp transistor circuit with given values: R1 = 25kΩ, R2 = 60kΩ, RC = 6kΩ, RE = 9kΩ, VCC = -12V, and βDC = 90 Example 2 30

31 Construct a complete circuit required to replace the transistor in Figure below with a pnp transistor. Given VCC = 10V, R1 = 78kΩ, R2 = 100kΩ, RC = 18kΩ, RE = 8kΩ. Example 3 31


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