New Product Introduction: 64Mb to 2Gb Parallel Page Mode GL-S NOR Flash Memory Family GL-S = Cypress’s 3.0-V, 65-nm Parallel NOR Flash Memory with MirrorBit®1.

New Product Introduction: 64Mb to 2Gb Parallel Page Mode GL-S NOR Flash Memory Family GL-S = Cypress’s 3.0-V, 65-nm Parallel NOR Flash Memory with MirrorBit®1 Technology The Industry’s Fastest Parallel Page Mode NOR Flash Memory Product Family for High-Performance Systems 1 Cypress Nonvolatile Memory cell technology with two localized electron storage locations to provide two data bits per cell, effectively doubling the NOR Flash Memory density Title

NOR Flash Memory Terms Nonvolatile Memory (NVM) Program Memory
A memory that retains data even when it is not powered Program Memory A low-latency and high-bandwidth NVM that enables fast execution of CPU instructions Flash Memory An NVM that alters the voltage at which a transistor conducts current by adding or removing electrons to set predefined “1” and “0” states for a memory cell NOR Flash Memory A Flash Memory with a memory architecture optimized for fast, low-latency random access (vs. fast consecutive address access) MirrorBit® Cypress NVM cell technology with two localized electron storage locations to provide two data bits per cell, effectively doubling the NOR Flash Memory density Terms of Art

Additional NOR Flash Memory Terms
Read Bandwidth The measurement of how fast data can be read from a memory, expressed in bytes per second Sector A physical block of memory locations with consecutive addresses (e.g., a 128KB sector in a 256Mb memory) Page A subset of consecutive memory locations within a Sector with a common row-address (e.g., 32 bytes in a 128KB Sector) Page Read Buffer A memory buffer of latches storing the content of the last-accessed Page, enabling a fast, low-latency random read access time within the buffer Page Mode A mode of operation that uses a Page Read Buffer to enable higher Read Bandwidth Program/Erase The operation required to change a NOR Flash Memory cell state from “1” to “0” or from “0” to “1”, respectively Write Buffer An SRAM-based memory buffer storing multiple bytes of data to be programmed in a single operation, enabling faster programming Sector Erase The operation in which all the bytes in a Sector of NOR Flash Memory are Erased simultaneously prior to Programming Chip Erase The operation in which all memory cells in the NOR Flash Memory array are Erased prior to Programming Parallel NOR Flash Memory Architecture Y Decoder Memory Array Page Page 0 Page 1 Page n Row 0 Sector 0 Row 1        Sector 0 Sector 1 Row r X Decoder Sector 2  Sector n    Page Read Buffer Write Buffer Terms of Art

High-Performance Systems Require the Fastest Parallel NOR Flash Memory
High-performance systems require parallel Page Mode NOR Flash Memory to access Program Memory as fast as possible Parallel NOR Flash Memory market segments: Designers of high-performance systems in these market segments require NOR Flash Memory with the highest Read Bandwidth, fastest Program time and the fastest Sector Erase time Designers of high-performance systems in these market segments require higher-temperature-range components because they need to shrink enclosures, reducing airflow Designers of high-performance systems require the fastest parallel Page Mode NOR Flash Memory with higher temperature ranges Automotive Communication Industrial Automation Automotive Infotainment System by BMW Router by Cisco Industrial Controller by Honeywell Market Vision

Performance Advantage
Cypress: No. 1 in NOR Flash, SRAM, NVRAM Comparison to Competitors’ Memory Product Portfolios Product Category Cypress Competitors Performance Advantage Metrics ISSI Micron Toshiba Winbond Macronix Fujitsu No. 1 NOR Flash Parallel NOR Flash  Highest Read Bandwidth Fastest Program/Erase 102 MBps Serial NOR Flash 160 MBps HyperFlash™1 Highest Read Bandwidth 333 MBps No. 1 SRAM QDR®-IV Synchronous SRAM Highest RTR (random transaction rate) 2.1 GT/s Asynchronous SRAM with ECC2 Highest reliability <0.1 FIT3 MicroPower SRAM Lowest standby current 1.5 µA No. 1 NVRAM Serial F-RAM™4 100 µA Parallel nvSRAM5 Fastest NVRAM6 20 ns AGIGARAM®7 Highest-density NVRAM6 16GB Cypress has the broadest portfolio of high-performance memories for embedded systems 1 A Cypress NOR Flash Memory product family that offers higher bandwidth than Quad SPI NOR Flash Memory with one-third the number of pins of parallel NOR Flash Memory 2 Error-correcting code 3 Failures In Time (billion hours) 4 Ferroelectric RAM 5 Nonvolatile SRAM 6 Nonvolatile memory that provides direct access to read and write to any memory location in any random order 7 A Cypress brand name Market Positioning

NVM Problems Designers Face
1. Systems require the highest Read Bandwidth to access Program Memory Lower NOR Flash Memory Read Bandwidth delays execution of CPU instructions, slowing system performance Traditional 256Mb parallel Page Mode NOR Flash Memory products may have Read Bandwidth as low as 58 MBps 2. Systems require the fastest Program time possible to reduce manufacturing costs Slow Programming time decreases PCB manufacturing throughput Traditional 256Mb parallel Page Mode NOR Flash Memory products are limited to a Program time of 0.5 ms per 512 bytes 3. Systems require the fastest Sector Erase time possible to update Program Memory as fast as possible Systems must conduct a Sector Erase prior to writing new data into NOR Flash Memory Traditional 256Mb parallel Page Mode NOR Flash Memory products may have Sector Erase times as high as 800 ms 4. Systems require components that support higher temperature ranges Smaller enclosures with reduced airflow require higher-temperature components Traditional 256Mb parallel Page Mode NOR Flash Memory products support only an industrial temperature range (-40ºC to +85ºC) Cypress’s 256Mb parallel Page Mode NOR Flash Memory solves these problems by providing: A 102-MBps Read Bandwidth A 0.34-ms Program time per 512 bytes A 275-ms Sector Erase time An industrial-plus temperature range (-40ºC to +105ºC) Cypress offers the industry’s fastest 256Mb, parallel Page Mode NOR Flash Memory for high-performance systems Design Problems

Cypress Parallel NOR Flash Memory: A Better Solution
Choose the NOR Flash Memory that combines the industry’s highest Read Bandwidth… With the industry’s fastest Program Times and … Fastest Sector Erase times… Read Bandwidth (MBps) Program Time per 512 bytes (ms) Sector Erase Time (ms) Cypress Micron Winbond Macronix Cypress Micron Winbond Macronix Cypress Micron Winbond Macronix To produce the fastest solutions for high- performance applications. Network Phone by Cisco Cypress Solution

Cypress 256Mb Parallel Page Mode NOR Flash Memory vs. Competition’s
Feature S29GL256S M29EW256 W29GL256S MX29GL256F Initial Access Time 90 ns 100 ns Page Access Time 15 ns 25 ns Page Read Buffer (Bytes) 32 16 Read Bandwidth (max)1 102 MBps 67 MBps 58 MBps Program Time (512B)2 0.34 ms 0.51 ms 0.96 ms Sector Erase Time (128KB)2 275 ms 800 ms 500 ms3 Chip Erase Time2 70 s 205 s 100 s3 Temperature Range -40ºC to +105ºC -40ºC to +85ºC 1 Read Bandwidth (max) calculation (uses a16-bit-wide data bus): Page Read Buffer ÷ (Initial Access Time + ((Page Read Buffer / 2) -1) x (Page Access Time)) 2 Conditions: 25ºC and VCC 3.0 V 3 Does not include pre-Programming: the operation required prior to a NOR Flash Erase in which all the bits in a Sector (128KB) are set to value “0” (approximately 100 ms) Competitive Comparison

Cypress’s 256Mb Parallel Page Mode NOR Flash Memory
Applications Block Diagram Advanced driver assistance system (ADAS) Automotive instrument cluster Automotive infotainment Communication equipment Industrial automation 256Mb Parallel Page Mode NOR Flash Memory D0 – D15 16 I/O Embedded Voltage Control Array A0 – A23 24 X Decoder Features RESET# Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C Initial access time: 90 ns Page access time: 15 ns Program1 time (512B): 0.34 ms (typical) Sector Erase2 time (128KB): 275 ms (typical) Industrial temp range (AEC-Q100 opt.): -40°C to +85°C Industrial plus temp range (AEC-Q100 opt.): -40°C to +105°C Packages: 56-pin TSOP 14 mm x 20 mm, 64-ball Fortified4 BGA 9 mm x 9 mm, 64-ball Fortified4 BGA 13 mm x 11 mm, 56-ball BGA5 9 mm x 7 mm Control Logic CE# Y Decoder OE# 24 WE# WP#6 Data Path RY/BY#7 16 CSP possible Collateral Availability Datasheet: S29GL256S Sampling: Now Production: Now 1 The operation required to change a value “1” to a value “0” in NOR Flash Memory 2 The operation in which all the bytes in a Sector of NOR Flash Memory are Erased simultaneously prior to Programming data such as boot code or parametric data 3 The number of times a NOR Flash Memory Sector can be Programmed or Erased before it wears out 4 Fortified BGA supports a 1-mm ball pitch 5 BGA supports a 0.8-mm ball pitch 6 Write Protect input 7 Ready/Busy output Product Overview

Parallel NOR Flash Memory Portfolio
S29AL-J 110nm, 3.0 V S29AS-J 110nm, 1.8 V S29JL-J 110nm, 3.0 V S29PL-J 110nm, 3.0 V S29GL-N 110nm, 3.0 V S29GL-P 90nm, 3.0 V S29GL-S 65nm, 3.0 V S29GL-T 45nm, 3.0 V AL,JL,PL,GL= 3.0 V AS= 1.8 V J,N= 110nm P= 90nm S= 65nm T= 45nm Density (Name) Initial / Page Access * footnotes 2Gb, 4Gb, 16Gb, & 32Gb Contact Sales 8Gb, 32Gb, & 64Gb Contact Sales 2Gb1 110 ns/25 ns * I 2Gb1 110 ns/20 ns * I, IA, IP, IPA 2Gb1 110 ns/20 ns * I, IA, IP, IPA, E, EA Q116 ≥256Mb 1Gb 110 ns/25 ns * I 1Gb 100 ns/15 ns * I, IA, IP, IPA 1Gb 100 ns/15 ns * I, IA, IP, IPA, E, EA Q315 512Mb 100 ns/25 ns * I 512Mb 100 ns/15 ns * I, IA, IP, IPA 512Mb 100 ns/15 ns * I, IA, IP, IPA, E, EA 256Mb 90 ns/25 ns * I 256Mb 90 ns/15 ns * I, IA, IP, IPA 128Mb (PL127J) 60 ns/20 ns * I, IA 128Mb 90 ns/25 ns * I 128Mb 90 ns/15 ns * I, IA, IP, IPA 64-128Mb 64Mb 55 ns/-- * I, IA 64Mb 55 ns/20 ns * I, IA 64Mb 90 ns/25 ns * I, IA 64Mb 70 ns/15 ns * I, IA, IP, IPA, E, EA 32Mb 60 ns/-- * I, IA 32Mb 55 ns/20 ns * I, IA 32Mb 90 ns/25 ns * I, IA 16Mb 55 ns/-- * I, IA, E, EA 16Mb 70 ns/-- * I, IA ≤32Mb 8Mb 55 ns/-- * I, IA, E, EA 8Mb 70 ns/-- * I, IA * I = Industrial: −40ºC to +85ºC IA = Industrial, AEC-Q100: −40ºC to +85ºC IP = Industrial plus: −40ºC to +105ºC IPA = Industrial plus, AEC-Q100: −40ºC to +105ºC E = Extended: −40ºC to +125ºC EA = Extended, AEC-Q100: −40ºC to +125ºC 1 S70 series (stacked die) Production Sampling Development Concept Status Availability QQYY QQYY EOL (Last-Time-Ship) QQYY Portfolio

Here’s How to Get Started
Download our datasheet: Cypress GL Datasheets Download our App Notes: Cypress Flash Product App Notes Register to access online technical support Contact Cypress for more information Automotive Infotainment System by Hyundai Switch by Cisco Getting Started

APPENDIX Appendix

References and Links S70GL02GS datasheet: 2Gb NOR Flash Memory S29GL-S Family datasheet: 128Mb – 1Gb NOR Flash Memory S29GL064S datasheet: 64Mb NOR Flash Memory App note: S29GL-S Page Mode Accesses App note: S29GL-S Page Read Mode – Reducing Startup Time Website: Cypress GL NOR Flash Memory to learn more Design models: IBIS and Verilog models to simplify your design Drivers and software: To accelerate your design cycle Cross reference guide: To see how Cypress stacks up with the competition Cross reference tool: To easily replace the competitor’s parallel NOR Flash Memory Hardware development tools: Kits, cards, boards to simplify your design Product selector guide: To choose the correct Cypress parallel NOR product Product roadmap: Contact Sales References and Links

Applications Block Diagram Advanced driver assistance system (ADAS) Automotive instrument cluster Automotive infotainment Communication equipment Industrial automation 64Mb Parallel Page Mode NOR Flash Memory D0 – D15 16 I/O Embedded Voltage Control Array A0 – A21 22 Features X Decoder Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C Initial access time: 70 ns Page access time: 15 ns Program1 time (256B): 0.4 ms (typical) Sector Erase2 time (64KB): 300 ms (typical) Industrial temp range (AEC-Q100 opt.): -40°C to +85°C Industrial plus temp range (AEC-Q100 opt.): -40°C to +105°C Extended temp range (AEC-Q100 opt.): -40°C to +125°C Packages: 48-pin TSOP 12 mm x 20 mm, 56-pin TSOP 14 mm x 20 mm, 64-ball Fortified4 BGA 9 mm x 9 mm, 64-ball Fortified4 BGA 13 mm x 11 mm, 48-ball BGA mm x 6.15 mm RESET# Control Logic CE# Y Decoder OE# 22 WE# WP#6 Data Path RY/BY#7 16 BYTE#8 CSP possible Collateral Availability Datasheet: S29GL064S Sampling: Now Production: Now 1 The operation required to change a value “1” to a value “0” in NOR Flash Memory 2 The operation in which all the bytes in a Sector of NOR Flash Memory are Erased simultaneously prior to Programming data such as boot code or parametric data 3 The number of times a NOR Flash Memory Sector can be Programmed or Erased before it wears out 4 Fortified BGA supports a 1-mm ball pitch 5 BGA supports a 0.8-mm ball pitch 6 Write Protect input 7 Ready/Busy output 8 An input that selects the data bus width of either 8 bits or 16 bits Product Overview

Applications Block Diagram Advanced driver assistance system (ADAS) Automotive instrument cluster Automotive infotainment Communication equipment Industrial automation 128Mb Parallel Page Mode NOR Flash Memory D0 – D15 16 I/O Embedded Voltage Control Array A0 – A22 23 Features X Decoder Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C Initial access time: 90 ns Page access time: 15 ns Program1 time (512B): 0.34 ms (typical) Sector Erase2 time (128KB): 275 ms (typical) Industrial temp range (AEC-Q100 opt.): -40°C to +85°C Industrial plus temp range (AEC-Q100 opt.): -40°C to +105°C Packages: 56-pin TSOP 14 mm x 20 mm, 64-ball Fortified4 BGA 9 mm x 9 mm, 64-ball Fortified4 BGA 13 mm x 11 mm, 56-ball BGA5 9 mm x 7 mm RESET# Control Logic CE# Y Decoder OE# 23 WE# WP#6 Data Path RY/BY#7 16 CSP possible Collateral Availability Datasheet: S29GL128S Sampling: Now Production: Now 1 The operation required to change a value “1” to a value “0” in NOR Flash Memory 2 The operation in which all the bytes in a Sector of NOR Flash Memory are Erased simultaneously prior to Programming data such as boot code or parametric data 3 The number of times a NOR Flash Memory Sector can be Programmed or Erased before it wears out 4 Fortified BGA supports a 1-mm ball pitch 5 BGA supports a 0.8-mm ball pitch 6 Write Protect input 7 Ready/Busy output Product Overview

Applications Block Diagram Advanced driver assistance system (ADAS) Automotive instrument cluster Automotive infotainment Communication equipment Industrial automation 512Mb Parallel Page Mode NOR Flash Memory D0 – D15 16 I/O Embedded Voltage Control Array A0 – A24 25 X Decoder Features RESET# Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C Initial access time: 100 ns Page access time: 15 ns Program1 time (512B): 0.34 ms (typical) Sector Erase2 time (128KB): 275 ms (typical) Industrial temp range (AEC-Q100 opt.): -40°C to +85°C Industrial plus temp range (AEC-Q100 opt.): -40°C to +105°C Packages: 56-pin TSOP 14 mm x 20 mm, 64-ball Fortified4 BGA 9 mm x 9 mm, 64-ball Fortified4 BGA 13 mm x 11 mm, 56-ball BGA5 9 mm x 7 mm Control Logic CE# Y Decoder OE# 25 WE# WP#6 Data Path RY/BY#7 16 CSP possible Collateral Availability Datasheet: S29GL512S Sampling: Now Production: Now 1 The operation required to change a value “1” to a value “0” in NOR Flash Memory 2 The operation in which all the bytes in a Sector of NOR Flash Memory are Erased simultaneously prior to Programming data such as boot code or parametric data 3 The number of times a NOR Flash Memory Sector can be Programmed or Erased before it wears out 4 Fortified BGA supports a 1-mm ball pitch 5 BGA supports a 0.8-mm ball pitch 6 Write Protect input 7 Ready/Busy output Product Overview

Cypress’s 1Gb Parallel Page Mode NOR Flash Memory
Applications Block Diagram Advanced driver assistance system (ADAS) Automotive instrument cluster Automotive infotainment Communication equipment Industrial automation 1Gb Parallel Page Mode NOR Flash Memory D0 – D15 16 I/O Embedded Voltage Control Array A0 – A25 26 X Decoder Features RESET# Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C Initial access time: 100 ns Page access time: 15 ns Program1 time (512B): 0.34 ms (typical) Sector Erase2 time (128KB): 275 ms (typical) Industrial temp range (AEC-Q100 opt.): -40°C to +85°C Industrial plus temp range (AEC-Q100 opt.): -40°C to +105°C Packages: TSOP 14 mm x 20 mm, 64-ball Fortified4 BGA 9 mm x 9 mm, 64-ball Fortified4 BGA 13 mm x 11 mm Control Logic CE# Y Decoder OE# 26 WE# WP#5 Data Path RY/BY#6 16 CSP possible Collateral Availability Datasheet: S29GL01GS Sampling: Now Production: Now 1 The operation required to change a value “1” to a value “0” in NOR Flash Memory 2 The operation in which all the bytes in a Sector of NOR Flash Memory are Erased simultaneously prior to Programming data such as boot code or parametric data 3 The number of times a NOR Flash Memory Sector can be Programmed or Erased before it wears out 4 Fortified BGA supports a 1-mm ball pitch 5 Write Protect input 6 Ready/Busy output Product Overview

Cypress’s 2Gb Parallel Page Mode NOR Flash Memory
Applications Block Diagram Advanced driver assistance system (ADAS) Automotive instrument cluster Automotive infotainment Communication equipment Industrial automation 2Gb Parallel Page Mode NOR Flash Memory D0 – D15 16 I/O Embedded Voltage Control Array A0 – A26 27 X Decoder Features RESET# Operating voltage range: 2.7 V to 3.6 V 100,000 Program1/Sector Erase2 endurance cycles3 20-year data retention at +55°C Initial access time: 100 ns Page access time: 15 ns Program1 time (512B): 0.34 ms (typical) Sector Erase2 time (128KB): 275 ms (typical) Industrial temp range (AEC-Q100 opt.): -40°C to +85°C Industrial plus temp range (AEC-Q100 opt.): -40°C to +105°C Packages: 64-ball Fortified4 BGA 13 mm x 11 mm Control Logic CE# Y Decoder OE# 27 WE# WP#5 Data Path RY/BY#6 16 CSP possible Collateral Availability Datasheet: S70GL02GS Sampling: Now Production: Now 1 The operation required to change a value “1” to a value “0” in NOR Flash Memory 2 The operation in which all the bytes in a Sector of NOR Flash Memory are Erased simultaneously prior to Programming data such as boot code or parametric data 3 The number of times a NOR Flash Memory Sector can be Programmed or Erased before it wears out 4 Fortified BGA supports a 1-mm ball pitch 5 Write Protect input 6 Ready/Busy output Product Overview

Parallel Page Mode NOR Flash Memory Product Selector Guide
S29/70GL-S Part Numbering Decoder SXXGLYYYS T F I Packing Type: 0 = Tray, 3 = 13” Tape and Reel Model Number: 01 = Uniform Sector, VCC = VIO = V, WP# = VIL Protects Highest Address Sector 02 = Uniform Sector, VCC = VIO = V, WP# = VIL Protects Lowest Address Sector 03 = Boot Sector, VCC = VIO = V, WP# = VIL Protects Top Two Address Sectors (GL064S only) 04 = Boot Sector, VCC = VIO = V, WP# = VIL Protects Bottom Two Address Sectors (GL064S only) 06 = x16 only, Uniform Sector, VCC = VIO = V, WP# = VIL Protects Highest Address Sector (GL064S only) 07 = x16 only, Uniform Sector, VCC = VIO = V, WP# = VIL Protects Lowest Address Sector (GL064S only) V1 = Uniform Sector, VCC = VIO = V, WP# = VIL Protects Highest Address Sector V2 = Uniform Sector, VCC = VIO = V, WP# = VIL Protects Lowest Address Sector V6 = x16 only, Uniform Sector, VCC = VIO = V, WP# = VIL Protects Highest Address Sector (GL064S only) V7 = x16 only, Uniform Sector, VCC = VIO = V, WP# = VIL Protects Lowest Address Sector (GL064S only) Temp Range: I = Industrial (-40ºC to +85ºC), V = Industrial plus (-40ºC to +105ºC) Package Material: F = Lead (Pb)-free (TSOP only), H = Low-Halogen, Pb-free (BGA only) Package Type: T = TSOP, F = Fortified BGA 13x11, D = Fortified BGA 9x9, G = BGA 9x7, B = BGA 8.15x6.15 Performance: 70 = 70 ns, 90 = 90 ns, 10 = 100 ns, 11 = 110 ns Base MPN: XX = 29, YYY = Mb 65nm MirrorBit parallel Page Mode Flash XX = 29, YYY = Mb 65nm MirrorBit parallel Page Mode Flash XX = 29, YYY = Mb 65nm MirrorBit parallel Page Mode Flash XX = 29, YYY = Mb 65nm MirrorBit parallel Page Mode Flash XX = 29, YYY = 01G 1Gb 65nm MirrorBit parallel Page Mode Flash XX = 70, YYY = 02G 2Gb Dual Die Stack MirrorBit parallel Page Mode Flash Product Selector Guide

Feature S29GL064S M29EW064 W29GL064C MX29GL640E Initial Access Time 70 ns 60 ns 90 ns Page Access Time 15 ns 25 ns Page Read Buffer (Bytes) 16 Read Bandwidth (max)1 91 MBps 68 MBps 60 MBps 65 MBps Program Time (256B)2 0.40 ms 0.16 ms 0.77 ms 0.64 ms Sector Erase Time (64KB)2 300 ms 500 ms 150 ms3 500 ms3 Chip Erase Time2 38s 64 s 19 s3 60 s3 Temperature Range -40ºC to +105ºC -40ºC to +85ºC 1 Read Bandwidth (max) calculation (uses a16-bit-wide data bus): Page Read Buffer ÷ (Initial Access Time + ((Page Read Buffer / 2) -1) x (Page Access Time)) 2 Conditions: 25ºC and VCC 3.0 V 3 Does not include pre-Programming: the operation required prior to a NOR Flash Erase in which all the bits in a Sector (64KB) are set to value “0” (approximately 100 ms) Competitive Comparison

Feature S29GL128S M29EW128 W29GL128C MX29GL128F Initial Access Time 90 ns 60 ns 70 ns Page Access Time 15 ns 25 ns Page Read Buffer (Bytes) 32 16 Read Bandwidth (max)1 102 MBps 68 MBps 60 MBps 65 MBps Program Time (512B)2 0.34 ms 0.28 ms 1.53 ms 0.96 ms Sector Erase Time (128KB)2 275 ms 500 ms 300 ms3 500 ms3 Chip Erase Time2 35 s 131 s 38 s3 60 s3 Temperature Range -40ºC to +105ºC -40ºC to +85ºC 1 Read Bandwidth (max) calculation (uses a16-bit-wide data bus): Page Read Buffer ÷ (Initial Access Time + ((Page Read Buffer / 2) -1) x (Page Access Time)) 2 Conditions: 25ºC and VCC 3.0 V 3 Does not include pre-Programming: the operation required prior to a NOR Flash Erase in which all the bits in a Sector (128KB) are set to value “0” (approximately 100 ms) Competitive Comparison

Feature S29GL512S M29EW512 W29GL512S MX29GL512G Initial Access Time 100 ns 90 ns Page Access Time 15 ns 25 ns Page Read Buffer (Bytes) 32 Read Bandwidth (max)1 98 MBps 67 MBps 102 MBps Program Time (512B)2 0.34 ms 0.51 ms 0.28 ms Sector Erase Time (128KB)2 275 ms 800 ms 250 ms3 Chip Erase Time2 141 s 410 s 100 s3 Temperature Range -40ºC to +105ºC -40ºC to +85ºC 1 Read Bandwidth (max) calculation (uses a16-bit-wide data bus): Page Read Buffer ÷ (Initial Access Time + ((Page Read Buffer / 2) -1) x (Page Access Time)) 2 Conditions: 25ºC and VCC 3.0 V 3 Does not include pre-Programming: the operation required prior to a NOR Flash Erase in which all the bits in a Sector (128KB) are set to value “0” (approximately 100 ms) Competitive Comparison

Cypress 1Gb Parallel Page Mode NOR Flash Memory vs. Competition’s
Feature S29GL01GS M29EW00A N/A1 MX68GL1G0G Initial Access Time 100 ns Page Access Time 15 ns 25 ns Page Read Buffer (Bytes) 32 Read Bandwidth (max)2 98 MBps 67 MBps Program Time (512B)3 0.34 ms 0.51 ms 0.28 ms Sector Erase Time (128KB)3 275 ms 800 ms 250 ms4 Chip Erase Time3 282 s 820 s 200 s4 Temperature Range -40ºC to +105ºC -40ºC to +85ºC 1 Winbond does not offer a 1Gb product 2 Read Bandwidth (max) calculation (uses a16-bit-wide data bus): Page Read Buffer ÷ (Initial Access Time + ((Page Read Buffer / 2) -1) x (Page Access Time)) 3 Conditions: 25ºC and VCC 3.0 V 4 Does not include pre-Programming: the operation required prior to a NOR Flash Erase in which all the bits in a Sector (128KB) are set to value “0” (approximately 100 ms) Competitive Comparison

Cypress 2Gb Parallel Page Mode NOR Flash Memory vs. Competition’s
Feature S70GL02GS1 M29EW00B1 N/A2 Initial Access Time 100 ns Page Access Time 15 ns 25 ns Page Read Buffer (Bytes) 32 Read Bandwidth (max)3 98 MBps 67 MBps Program Time (512B)4 0.34 ms 0.51 ms Sector Erase Time (128KB)4 275 ms 800 ms Chip Erase Time4 564 s 1640 s Temperature Range -40 to +105ºC -40ºC to +85ºC 1 Two 1Gb die multi-chip package 2 Winbond and MXIC do not offer a 2Gb product 3 Read Bandwidth (max) calculation (uses a16-bit-wide data bus): Page Read Buffer ÷ (Initial Access Time + ((Page Read Buffer / 2) -1) x (Page Access Time)) 4 Conditions: 25ºC and VCC 3.0 V Competitive Comparison

New Product Introduction: 64Mb to 2Gb Parallel Page Mode GL-S NOR Flash Memory Family GL-S = Cypress’s 3.0-V, 65-nm Parallel NOR Flash Memory with MirrorBit®1.

Similar presentations

Presentation on theme: "New Product Introduction: 64Mb to 2Gb Parallel Page Mode GL-S NOR Flash Memory Family GL-S = Cypress’s 3.0-V, 65-nm Parallel NOR Flash Memory with MirrorBit®1."— Presentation transcript:

Similar presentations

About project

Feedback

Log in

Auth with social network:

New Product Introduction: 64Mb to 2Gb Parallel Page Mode GL-S NOR Flash Memory Family GL-S = Cypress’s 3.0-V, 65-nm Parallel NOR Flash Memory with MirrorBit®1.

Similar presentations

Presentation on theme: "New Product Introduction: 64Mb to 2Gb Parallel Page Mode GL-S NOR Flash Memory Family GL-S = Cypress’s 3.0-V, 65-nm Parallel NOR Flash Memory with MirrorBit®1."— Presentation transcript:

Similar presentations

About project

Feedback