1. William Stallings Computer Organization and Architecture 8th Edition
Chapter 9
Computer Arithmetic

2. Arithmetic & Logic Unit
Does the calculations
Everything else in the computer is there to service this unit
Handles integers
May handle floating point (real) numbers
May be separate FPU (maths co-processor)
May be on chip separate FPU (486DX +)

3. ALU Inputs and Outputs

4. Integer Representation
Only have 0 & 1 to represent everything
Positive numbers stored in binary
e.g. 41=
No minus sign
No period
Sign-Magnitude
Two’s compliment

5. Left most bit is sign bit 0 means positive 1 means negative
Sign-Magnitude
Left most bit is sign bit
0 means positive
1 means negative
+18 =
-18 =
Problems
Need to consider both sign and magnitude in arithmetic
Two representations of zero (+0 and -0)

6. Two’s Compliment
+3 =
+2 =
+1 =
+0 =
-1 =
-2 =
-3 =

7. One representation of zero Arithmetic works easily (see later)
Benefits
One representation of zero
Arithmetic works easily (see later)
Negating is fairly easy
3 =
Boolean complement gives
Add 1 to LSB

8. Geometric Depiction of Twos Complement Integers

9. Negation Special Case 1
0 =
Bitwise not
Add 1 to LSB
Result
Overflow is ignored, so:
- 0 = 0 

10. Negation Special Case 2
-128 =
bitwise not
Add 1 to LSB
Result
So:
-(-128) = X
Monitor MSB (sign bit)
It should change during negation

11. Range of Numbers 8 bit 2s compliment 16 bit 2s compliment
= =
= = -27
16 bit 2s compliment
= =
= = -215

12. Conversion Between Lengths
Positive number pack with leading zeros
+18 =
+18 =
Negative numbers pack with leading ones
-18 =
-18 =
i.e. pack with MSB (sign bit)

13. Addition and Subtraction
Normal binary addition
Monitor sign bit for overflow
Take twos compliment of substahend and add to minuend
i.e. a - b = a + (-b)
So we only need addition and complement circuits

14. Overflow rule
If two numbers are added, and they are both positive or both negative, then overflow occurs if and only if the result has the opposite sign.

15. Subtraction and overflow

16. Hardware for Addition and Subtraction

17. Multiplication
Complex
Work out partial product for each digit
Take care with place value (column)
Add partial products

18. Multiplication Example
Multiplicand (11 dec)
x Multiplier (13 dec)
Partial products
Note: if multiplier bit is 1 copy
multiplicand (place value)
otherwise zero
Product (143 dec)
Note: need double length result

19. Unsigned Binary Multiplication

20. Execution of Example M – multiplicand Q – multiplier

21. Multiplying negative numbers

22. Flowchart for Unsigned Binary Multiplication

23. Multiplying Negative Numbers
This does not work!
Solution 1
Convert to positive if required
Multiply as above
If signs were different, negate answer
Solution 2
Booth’s algorithm

24. Booth’s Algorithm

25. Example of Booth’s Algorithm

26. Why does Booth’s Algorithm work?
M X ( ) = M X ( ) = M X ( ) = M X (30) = M X ( ) M X ( ) = M X ( ) = M X ( )

27. Division
More complex than multiplication
Negative numbers are really bad!
Based on long division

28. Division of Unsigned Binary Integers
Quotient
Divisor
1011
Dividend
1011
001110
Partial
Remainders
1011
001111
1011
Remainder
100

29. Flowchart for Unsigned Binary Division

30. Twos complement division
Load the divisor into the M register and the dividend into the A,Q registers.
Shift A,Q left one position.
If M and A have the same signs, perform A-M else perform A+M
The preceding operation is successful if the sign of A is the same as before, after the operation, * if the operation is successful or A = 0, then set Q0 = 1 * if the operation is unsuccessful and A is = not 0 then set Q0 = 0 and restore the previous value of A.
Repeat steps 2 through 4 as many times as there are bit positions in Q.
The remainder is in A. If the signs of the divisor and dividend is the same, then the quotient is Q, else it is the twos complement of Q.

31. Twos Complement Division

32. Twos complement division
Load the divisor into the M register and the dividend into the A,Q registers.
Shift A,Q left one position.
If M and A have the same signs, Perform A-M else perform A+M
The preceding operation is successful if the sign of A is the same as before, after the operation, * if the operation is successful or A = 0, then set Q0 = 1 * if the operation is unsuccessful and A is = not 0 then set Q0 = 0 and restore the previous value of A.
Repeat steps 2 through 4 as many times as there are bit positions in Q.
The remainder is in A. If the signs of the divisor and dividend is the same, then the quotient is Q, else it is the twos complement of Q.

33. Twos Complement Division

34. Is this correct?
D = Q X V + R where
D =7 V=3  Q= 2 R = 1
D =7 V= -3  Q= -2 R = 1
D =-7 V=3  Q= -2 R = -1
D =-7 V=-3  Q= 2 R = -1
Preferred way to do two’s complement is to convert operand into unsigned values and at the end to account for the signs.

35. Numbers with fractions Could be done in pure binary
Real Numbers
Numbers with fractions
Could be done in pure binary
= =9.625
Where is the binary point?
Fixed?
Very limited
Moving?
How do you show where it is?

36. Floating Point +/- .significand x 2exponent Misnomer
Point is actually fixed between sign bit and body of mantissa
Exponent indicates place value (point position)

37. Floating Point Examples

38. Signs for Floating Point
Mantissa (or significand) is stored in 2s compliment
Exponent is in excess or biased notation
e.g. Excess (bias) 127 means
For the 8 bit exponent field the value range 0-255
Add 127 to the true exponent to get value to be stored
Thus a range of -127 to +128 can be stored

39. Normalization
FP numbers are usually normalized
i.e. exponent is adjusted so that leading bit (MSB) of mantissa is 1
Since it is always 1 there is no need to store it
(c.f. Scientific notation where numbers are normalized to give a single digit before the decimal point
e.g x 103)

40. Integer Ranges
For a 32 bit number using the twos complement integer representation, all the integers from
- 231 to +(231 – 1) can be represented.

41. FP Ranges For a 32 bit number
8 bit exponent and
24 bit significand
The 8 bit exponent is in biased representation thus 127 is added to move the range from
(-127 to +128) to
(0 to +255)

42. Expressible Numbers

43. Let us assume we have a 3 bit significand
Why the
Let us assume we have a 3 bit significand
The biggest number we can then represent is
1.1112
thus –
= 210 – 2-310

44. Density of Floating Point Numbers

45. Let us again assume we want to write numbers between 0 and 2
Why?
Let us again assume we want to write numbers between 0 and 2
0__¼_½__1__________2

46. IEEE 754
Standard for floating point storage
32 and 64 bit standards
8 and 11 bit exponent respectively
Extended formats (both mantissa and exponent) for intermediate results

47. IEEE 754 Formats

48. FP Arithmetic +/-
Check for zeros
Align significands (adjusting exponents)
Add or subtract significands
Normalize result

49. FP Addition & Subtraction Flowchart

50. FP Arithmetic x/
Check for zero
Add/subtract exponents
Multiply/divide significands (watch sign)
Normalize
Round
All intermediate results should be in double length storage

51. Floating Point Multiplication

52. Floating Point Division

53. Required Reading
Stallings Chapter 9
IEEE 754 on IEEE Web site