1. Creotech Instruments
Jacek Kosiec
On behalf of

2. Creotech Instruments – major facts
Creotech Ltd. was founded in 2008 by three scientists who then worked at CERN (Greg and Pawel Kasprowicz, Greg Brona)
Presently about 50 employees
General activities: development, design, manufacturing, assembly and testing of electronics
Major technology areas: control & measurement systems (digital cameras, WR, MTCA, …)

3. Activities of the company
Major fields of applications:
scientific apparatus – e.g. CERN & GSI (WR boards manufacturing), Culham Center for Fusion Energy (development of significant elements of the safety system for tokamak based on MTCA)
space – satellite segment (flight electronics assembly qualification by ESA, e.g. a PSU assembly for ExoMars mission launched ), ground segment (EGSE, Ground Station equipment), under way a microsatellite integration

4. Laboratory nad manufacturing facilities
2 cleanrooms 130 m2
Electronics development lab
Electronics automatic assembly line (see below)

5. Manufacturing of WR gear
Switch
SPEC
FMC DIO 5CH TTL
FMC DEL 1NS 4CHA
FMC DAC 600M 12b 1cha DDS
FMC ADC 100M 14B 4CHA 

6. Example of MTCA application at NASA – Space Network Ground Segment Sustainment

7. Grzegorz Kasprowicz presented by: Marek Gumiński
WR support in MTCA.4
Grzegorz Kasprowicz
presented by: Marek Gumiński
On behalf of

8. Agenda Introduction to MTCA.4 MicroTCA Carrier HUB WR in MTCA.4
WR MCH project
Synchronization of MTCA.4 crates
Synchronization inside MTCA.4 crate
Additional functionality
WR MTCA.4 backplane
Current status and conclusions

9. Introduction to MTCA.4
Source: [1]

10. Introduction to MTCA.4
Chassis for multiple processing modules – Advanced Mezzanine Card (AMC)
MTCA include mechanical, electrical and design standardization
Crate provide powering, cooling, connectivity and clocking
Up to 12 AMC slots, 2 MCH, 2 cooling and 4 power modules
Multiplication of modules gives power cooling and management redundancy and robustness
No standard synchronization technique is provided
µTCA.4 chassis is also compatible with standard µTCA.0 AMCs

11. Introduction to MTCA.4 MTCA has multiple fields of redundancy.
As you can see on block diagram two cooling units, MCH’s and multiple power modules may be installed.
Source: [2]

12. MicroTCA Carrier HUB Slajd w ramach przejscia do kolejnego tematu
zrodla
Source: [3]

13. MicroTCA Carrier HUB AMCs, power and cooling management
Data connectivity to AMCs
Clock distribution
May be integrated into MTCA chassis or in AMC format
May be implemented on multiple PCBs with multiple connectors
AMC – Advanced Mezzanine Card – board standard

14. MicroTCA Carrier HUB Red dotted lines represent MCH modules.
Clocking module contain two bidirectional CLK lines.
Switched by low jitter multiplexers.
Image is cut, bottom showed possible connections to SSD drive.
Source: [4]

15. WR in MTCA.4
Todo: dodac zrodlo
Source: [1]

16. WR in MTCA.4
During 4th MicroTCA Workshop for Industry and Research (2015) Creotech presented simple solution to use WR in MTCA crate
WR node was ported to AFCK [5] board (AMC)
WR link was set via FM-S14 FMC [6] with standard WR SFP transceivers
WR node could be implemented on each AMC card, but WR clocking components and SFP port required on each card.
Time on each node would differ as in distributed WR network despite the nodes being close to each other
could be distributed to all AMC cards via MCH clock mux
WR clocking components and SFP port required on each card
WR node on each FPGA

17. WR in MTCA.4
WR node could be implemented on each AMC card, but WR clocking components and SFP port required on each card.
Time on each node would differ as in distributed WR network despite the nodes being close to each other
could be distributed to all AMC cards via MCH clock mux
WR clocking components and SFP port required on each card
WR node on each FPGA

18. WR in MTCA.4
Clock from WR node on AMC card could be sent to clocking module in MCH and distributed to other cards
Utilization of both clock lines in order to distribute WR clock
Clock lines length to each AMC module differ on standard backplane
TODO:
Fajnie byloby dac zdjecie WR z MTCA workshop
Zrodla

19. WR MCH project
Slajd w ramach przejscia do kolejnego tematu
zrodla

20. WR MCH project Compatible with existing MCH Collaboration with N.A.T.
Implementation of WR node on MCH
Distribution of WR time and clock to AMC boards
Maximization of robustness
Simple management
Assumptions
Compatibility will decrease system cost and simplify modification
Delays inside crate will be possible to measue and constant – no point in implementation of WRS in MCH and nodes in modules
More over each module would require WR clocking components and node inside FPGA
In our solution almost any AMC board may be synchronized with accuracy provided with WR protocol

21. WR MCH project TODO: Zrodla Two redundant WR nodes
Connection to Gigabit Ethernet from main MCH module (possibility to provide external interface with little modification of main MCH module)
Connection to PCIe bus
Two RF-DDS generators – may be used for RF over WR
TDC/DTC modules considered on Trigger on MLVDS lines
Possibility to switch between WR, DDS and external clock sources.
Show the schematics
Detailed hardware specification
Programmable resources:
Xilinx Kintex-7 XC7K70T-1FBG676C (smallest K7 FPGA)
MMC: ATMEGA1284P
Memory:
1GB (16Gbit) DDR3 SDRAM (32-bit interface), 800MHz (clock)
SPI Flash for FPGA configuration. Accessible by MMC
EEPROM with MAC and unique ID
Connectivity:
SFP+ cage for WR connectivity
Optional SFP+ cage for redundant WR link (available only on dual width front panel)
Mini-USB UART connected to FPGA
GTX connected to SFP, redundant SFP, Tongue 1, Tongue 3
trigger input, reference clock input (single width front panel)
trigger input/output, reference clock input/output, AUX clock input/output (double width front panel)
Clocking:
Dual clock distribution circuit compatible with White Rabbit
Dedicated two PLL circuits for WR-DDS clock generators
Quad clock crossbar, 16 inputs x 16 outputs - capability of independent routing of up to two different clock signals to each TCLKA/TCLKB clock trees

22. Synchronization of MTCA.4 crates
MCH as standard WR node
Two WR nodes working in parallel
Each node connected to different switch
In case of link failure other node takes over
Compatibility will decrease system cost and simplify modification
Delays inside crate will be possible to measue and constant – no point in implementation of WRS in MCH and nodes in modules
More over each module would require WR clocking components and node inside FPGA
In our solution almost any AMC board may be synchronized with accuracy provided with WR protocol

23. Synchronization inside MTCA.4 crate
WR clock (or synchronous) distributed to AMC cards via CLK1 or CLK2 lines
Dedicated WR backplane provide length aligned CLK lines
PPS and time code propagation over MLVDS lines (custom connection)
Compatibility will decrease system cost and simplify modification
Delays inside crate will be possible to measue and constant – no point in implementation of WRS in MCH and nodes in modules
More over each module would require WR clocking components and node inside FPGA
In our solution almost any AMC board may be synchronized with accuracy provided with WR protocol

24. Additional functionality
RF distribution over White Rabbit [7] will be possible
One of GTX will be used to implement TDC/DTC on MCH front panel
IO SERDES ma be used to implement TDC/DTC on MLVDS lines
Compatibility will decrease system cost and simplify modification
Delays inside crate will be possible to measure and constant – no point in implementation of WRS in MCH and nodes in modules
More over each module would require WR clocking components and node inside FPGA
In our solution almost any AMC board may be synchronized with accuracy provided with WR protocol

25. WR MTCA.4 backplane
Schroff-Pentair in collaboration with Creotech Instruments is introducing backplane dedicated for WR MCH
In order to provide accurate synchronization length of all CLK1 and CLK2 lines for both MCH aligned to 20 ps
Previously reserved MCH pins used to connect MCH to MLVDL lines
Under development

26. WR MTCA.4 backplane
Reserved (rarely used) pins of MCH connected to MLVDS lines
Connections done via optional resistors
Port MLVDS
TODO:
Zrodlo
Source: []

27. Current status Schematics of WR MCH timing module is done
PCB layout is under way
WR backplane is under development
Under development

28. Conclusions
WR MCH will enable synchronization of multiple MTCA.4 crates with sub nanosecond accuracy
AMC modules inside MTCA.4 crate will receive the same clock signal
Almost any AMC board able to benefit from WR synchronization
Project based on open source and open hardware
High reliability and precise synchronization may provide new fields of application for both WR and MTCA.4 standards
Under development

29. Thank you for attention

30. List of sources http://www.schroff.de/microtca4/why-MTCA4.html
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