1. Electronic Readout System for the Belle II Imaging Time- Of-Propagation Detector
Dmitri Kotchetkov
University of Hawaii at Manoa
for the Belle II iTOP Detector Group
March 3, 2017

2. Barrel Particle Identification at Belle II
Belle II experiment at the SuperKEKB electron-positron collider
(KEK, Tsukuba, Japan):
asymmetric collisions of 7 GeV electron beam with 4 GeV positron beam
(program’s total integrated luminosity = 50 ab-1)
studies of CP-violating physics processes from decays of U(4S) resonances
need for improved barrel particle identification to detect rare and
previously unobserved phenomena and to mitigate beam backgrounds
in the pT range from 1 GeV/c to 4 GeV/c pions have to be separated from
kaons with the efficiency of 85-90%, while the misidentification efficiency
has to be less than 5%
new 8192-channel Cherenkov radiation imaging Time-Of-Propagation
Detector (iTOP)

3. Imaging Time of Propagation Detector
16 modules placed between the Central Drift Chamber and the Electromagnetic Calorimeter
iTOP
Central Drift
Chamber
Electromagnetic Calorimeter
in each module:
2.5 m long quartz
bar glued from two
125 x 45 x 2 cm2
pieces
Central Drift
Chamber
Electromagnetic Calorimeter
a spherical mirror is glued to one end and a prism is glued to another end of the bar
iTOP

4. Cherenkov Radiation in Quartzy z x
quartz
charged
particle
Cherenkov photon from a pion
Cherenkov photon
from a kaon
Hamamatsu microchannel plate photomultiplier tube (MCP-PMT) R M16(N)
16-channels (4 x 4 pixel matrix)
5.275 x mm2 pixels
32 MCP-PMTs are attached to each prism
measurement of Cherenkov photon
x-y position at the prism surface
(MCP-PMT pixel coordinate) and
in-quartz propagation time

5. Ice Radio Sampler Ice Radio Sampler version X (IRSX) ASIC
adaptation from designs for neutrino
experiments in Antarctica
0.25 mm TSMC CMOS process
8 channels
switched capacitor array with 32,768
storage cells for each channel sampling
buffer
operational sampling speed is 2.714
gigasamples per second

6. Sample and Hold Cell Vin Csample Vpedestal Write Strobe Trigger T1 T2
to ADC
basic unit or a Switched Capacitor Array
trigger or write strobe
closes an analog switch
and an input signal gets
stored in a 14 fF capacitor
charge remains held in
the capacitor until it is
overwritten or until discharge occurs through leakage

7. Wilkinson Analog-to-Digital Conversion
common voltage ramp connected to a positive
input of a comparator
11-bit Gray code counter increments while the ramp voltage increases
when the voltage ramp level exceeds the stored sample voltage, the comparator latches the Gray code value
12th bit is for the phase
Vin
Vramp
Vcomp
time
Comparator
Register
Vin
Vcomp
D (0:11)
Vramp 12
Ramp Generator
Clock
Gray Code
Counter
stored voltage → time interval → ADC value

8. Subdetector Readout Module
128-channel standalone
front-end electronic readout unit
assembly of four ASIC carrier Boards and one Standard Control Read-Out Data (SCROD) board
ASIC carrier board:
four 8-channel IRSX ASICs and one Xilinx Zynq Z-7030 System on a Chip
SCROD board:
one Xilinx Zynq Z-7045 System on a Chip

9. SCROD debugging trigger link programming and clock data RAM Zynq
low voltage
power
connectors to
ASIC carrier

10. ASIC Carrier Board connectors to ASIC carrier Zynq Z-7030 IRSX
pogo pin assemblies
amplifiers
pogo pin assemblies
amplifiers
IRSX
connectors to ASIC
carrier or SCROD

11. Front Boards
sockets for MCP-PMT anode and HV contacts (one board per four MCP-PMTs)
contact pads for ASIC carrier pogo pins
contact pads for HV divider board

12. High Voltage Board 8 channels (one channel per one MCP-PMT)
each channel: 400 MOhm resistive divider coupled with high voltage transistors
aluminum enclosure
attached to a Subdetector Readout Module and to a water cooled aluminum plate
pogo pins are pressed against the HV contact pads on two front boards
MCP-PMTs:
operational voltage: from 2100 V to 3100 V
charge gain: from 2 x 105 to 3 x 105

13. Single-Photon Laser Signal Data Taking
data fiber link
programming and clock
high voltage board
water cooled plate
laser fiber
MCP-PMT

14. iTOP Readout Scheme one iTOP module: 32 MCP-PMTs 4 Subdetector Readout
ASIC carrier
4 IRSX ASICs
SRM
one iTOP module:
32 MCP-PMTs
4 Subdetector Readout
Modules (SRMs)
16 ASIC carrier boards
64 IRSX ASICs
512 channels

15. SCROD Firmware Device: Xilinx Zynq Z-7045 PL: Programmable Logic
T/T
508.9/4 MHz
Trigger
Data PS
Device: Xilinx Zynq Z-7045
PL: Programmable Logic
Kintex-7 FPGA
350,000 cells
218,600 look-up tables
PS: Processing System dual-core ARM Cortex-9
constrained at 668 MHz
T/T: Trigger and Timing
GTX: Gigabit Transceiver PL
B2TT
Feature extraction
System Trigger
GTX
GTX
AXI-Lite
Bus
Trigger Stream
(Aurora)
Register
Data
Output Data Buffering
Local Registers
PS Main
DDR
Trigger Buffer and
Sorter
Register
Input Data Buffering
Pedestal calculation
Data
Serial
Serial
Serial
Serial
GTX
GTX
GTX
GTX
mezzanine
connectors

16. ASIC Carrier Board Firmware
mezzanine
connectors
Device: Xilinx Zynq Z-7030
PL: Programmable Logic
Kintex-7 FPGA
125,000 cells
78,600 look-up tables
PS: Processing System dual-core ARM Cortex-9
668 MHz
T/T: Trigger and Timing
GTX: Gigabit Transceiver PL PS
Clock
Trigger
Register
PS Main – Status Monitoring
Serial
T/T
GTX
AXI-Lite Bus
Data
Output Data Buffering
ASIC Master Control
Sequencer Control
Readout Buffering
IRSX
control
(x 4)
Auxiliary Monitoring
Register Interface
Trigger Monitoring
Analog Memory
Digitization
Data Readout
ASIC
(x 4)
Serial Data Interface
Channel-Level Triggers
Memory Addressing
Digitization (Gray Code)
Serial Data Interface

17. ASIC Carrier Timing Performance
measurement of 20 ns time delay between leading edges of a reconstructed 1.5 V pulse of 7 ns width and its delayed copy
overall time resolution is ps

18. Timing Performance with MCP-PMTs
measurement of a time between leading edges of
a reconstructed pulse from MCP-PMT signal and a reconstructed calibration reference pulse
single photon laser signal
laser trigger is independent from the calibration pulse
overall time resolution at the laser test bench is from
60 ps to 90 ps
(MCP-PMT transit time spread = 30 ps;
laser test bench TDC time resolution = 25 ps)

19. global clock and trigger
Back-End DAQ System
High Speed Link Board
1.6 GHz Intel Atom Z530 CPU
Common Pipelined Platform
for Electronic Readout
(COPPER) version III
9U VME format
one High Speed Link Board
collects data from one SRM
one COPPER-III board serves
one iTOP module
16 COPPER-III boards serve
the iTOP detector
COPPER-III board
global clock and trigger

20. Integration at the iTOP
Assembled Subdetector Readout Modules: 78
Installed at iTOP (8192 channels): 64
Installed at a spare iTOP module: 4
Uninstalled spare SRMs:
In-situ data taking from calibration laser and cosmic muon ray events without magnetic field demonstrated performance comparable to or surpassing the in-lab performance
DAQ tests with 1.5 T magnetic field have started and will be continued
through several campaigns
Ongoing development of online and offline calibration software
Time resolution measured in the calibration laser events is less than 50 ps