1. Electronics The ninth and tenth lectures
Ninth week
/ 1/ 1437 هـ
أ / سمر السلمي

2. Outline for today Chapter Two: Ohmic Contact
Metal–Oxide–Semiconductor Contact (MOS)
Structure , Effect of voltage
Energy levels forms in MOS in different bias
Chapter Three: Bipolar junction transistor :
Transistor(Concept, mission, types)
Bipolar junction transistor
Structure &Contact methods for BJT’s Circuits
Currents and voltage and symbols in circles BJT
Band Energy Description of BJT at (equilibrium and non equilibrium Conditions) to npn & pnp
Modes of Operation for BJT
What happens inside transistor
Transistor parameters
How amplification occurs in the transistor

3. Time of Periodic Exams
The first periodic exam in / 2 / 1438 هـ , Please everyone attend In her group
The second homework
I put the second homework in my website in the university homework Due Thursday 26 / 1/ 1438 H in my mailbox in Faculty of Physics Department , I will not accept any homework after that , but if you could not come to university you should sent it to me by in the same day

4. Ohmic Contact The scientific method to create This contact
Previously, we discussed about pn junction (a semiconductor type of n-type next to the other type p-type)   But what about another junction as semiconductor next to insulator or metal
Ohmic Contact
This contact consists metal and semiconductor (which follows Ohm's Law and does not have the ability to rectifier current and (current and voltage) characteristic is linear in both forward and reverse bias )
The scientific method to create This contact
1- by increasing impurities in a semiconductor at the contact area so that the charge carriers crosses barrier
2- by selecting a work function of metal (eΦ) close to work function of semiconductor
work function: the required energy to remove an electron from Fermi level or required energy for ionization metal =

5. Ohmic Contact
The left figure illustrates Fermi level and work function in the metal and semiconductor (n-type) before contact. The right figure illustrates them when configure junction of metal and semiconductor (n-type) in equilibrium condition and how Fermi level aligning between metal and semiconductor (when there are negative charges close to surface of metal, they attract positive charges in metal ) =

6. Ohmic Contact
The left figure illustrates Fermi level and work function in the metal and semiconductor (p-type) before contact. The right figure illustrates them when configure junction of metal and semiconductor (p-type) in equilibrium condition and how Fermi level aligning between metal and semiconductor (when there are positive charges close to surface of metal, they attract negative charges in metal ) =

7. Metal–Oxide–Semiconductor Contact (MOS) structure
In this contact, a thin layer of oxide is put on the surface of a semiconductor n-type or p-type. Then, pole metallic (metal) is put above the surface of the oxide layer . We should choose a good electrical insulation of oxide which has a large energy gap and isolates the metal from the semiconductor which no passing electrical current between them.
In thermal equilibrium condition In the absence of application of the electric
field or the voltage, the Fermi and connection
and valence levels are horizontal and flat.  When applying an electric field, there is
a bending in energy levels

8. Effect of voltage bias Metal–Oxide–Semiconductor Contact (MOS)
According to the applied voltage on this contact, it will consist three different situations such as what is shown in figure .
1- depletion inversion accumulation =

9. Metal–Oxide–Semiconductor Contact (MOS)
Effect of voltage bias (metal and n-type contact)
1 - Depletion :
When applying negative bias voltage at the surface of metal, a small amount of negative charges is made. Then, the oxide layer prevent electric current from passage to semiconductor . However, the electrons in substrate of semiconductor n-type will be affected by these negative charges and moved away from the area located under oxide and created the depletion region in semiconductor similar to those that created in pn Junction =

10. Metal–Oxide–Semiconductor Contact (MOS)
Effect of voltage bias (metal and n-type contact)
2 - Inversion
When increasing a negative bias voltage on surface of metal, Instead of expanding more of depletion region within the semiconductor, inversion status is formed which holes gather next to the surface of the oxide. Those holes is the minority carriers in the semiconductor n-type.
3 - Accumulation
When applying positive bias voltage at the surface of metal, negative majority carriers attract and accumulate at the surface of the oxide in semiconductor n-type. =

11. Metal–Oxide–Semiconductor Contact (MOS)
Energy levels forms in MOS in different bias (metal and p-type contact)
1- Depletion :
When applying positive bias voltage, Fermi level move down from its first location in thermal equilibrium condition. Also,
straight line bend at the energy level in oxide
and energy levels of the semiconductor p-type
move down near the interface of oxide.
In addition, electrons drop down in potential
well. We notice that the distribution of carriers
density of per unit area in semiconductor p-type equal in the metal =

12. Metal–Oxide–Semiconductor Contact (MOS)
Energy levels forms in MOS in different bias (metal and p-type contact)
2 - Inversion
When increasing positive bias voltage more than threshold voltage VT ; the semiconductor inverse and electrons occupy
inversion layer. Fermi level move more down
from its first location in thermal equilibrium
condition. Also, straight line bend at the energy
level in oxide and energy levels of
semiconductor p-type move more down near
interface of oxide. In addition, electrons drop
more down in potential well. We notice that the
distribution of carriers density of per unit area
in semiconductor p-type for maximum
depletion region Wmax in addition to carrier
of inversion layer Qn equal in the metal =

13. Metal–Oxide–Semiconductor Contact (MOS)
Energy levels forms in MOS in different bias (metal and p-type contact)
3- Accumulation
When applying negative bias voltage, Fermi level move up from its first location in thermal equilibrium condition. Also,
Straight line bend at the energy level in oxide
and energy levels of the semiconductor p-type
move up near the interface of oxide.
In addition, holes climb up in potential
well. We notice that the distribution of carriers
density of per unit area in semiconductor p-type equal in the metal =

14. The First Exam Until Here

15. Transistor Brief its history
The discovery of the transistor in year 1947 in Bell Lab’s in United States of America. Since then, this discovery is one of the most important discoveries and that the performance of a global revolution in technology.
the first transistor in Now

16. Transistor Transistor mission
In the second chapter we studied and we focused on two types of contacts :
PN Junction: ( semiconductor of n-type & p-type ) which enters in the structure of bipolar junction transistor (BJT) and Junction gate field-effect transistor (JFET)
MOS contact: (Metal, Oxide, Semiconductor of n-type or p-type) which enters in the structure of metal–oxide–semiconductor field-effect transistor (MOSFET)
Concept of transistor
It is a piece of three parts and as PN Junction this parts contain extrinsic semiconductor N-type & p-type
Transistor mission
1. Works as amplifier in electrical signals 2. works as switch in integrated circuits =

17. Transistor’s types Bipolar junction transistor (BJT):
The most important types of transistor two types are:
Bipolar junction transistor (BJT):
Will be studied in detail in this chapter (Chapter There)
Field-effect transistor (FET) :
Will be studied in detail in (Chapter four)
Diffusion transistor
Unijunction transistors
Single-electron transistors
Nanofluidic transistor,

18. Transistor’s types
There are special types classified within provirus types which
Within bipolar junction transistor
Heterojunction bipolar transistor Schottky transistor
Avalanche transistor Darlington transistors.
Insulated-gate bipolar Photo transistor
Multiple-emitter transistor Multiple-base transistor
Within field effect transistor
Carbon nanotube field-effect transistor (CNFET)
Junction gate field-effect transistor (JFET)
metal–semiconductor field-effect transistor (MESFET (
metal–oxide–semiconductor field-effect transistor (MOSFET)
metal–Insulator–semiconductor field-effect transistor (MISFET)
Organic field-effect transistor
Ballistic transistor
Floating-gate transistor etc… =

19. Bipolar junction transistor
BJT structure
The Bipolar junction transistor contains
of npn or pnp
Which is distributed in three parts
Emitter, Base & Collector
emitter and collector contain from the
same semiconductor type either n-type
or p-type; but often emitter has more
Impurities than base and collector.
Therefore n+p n or p+n p =

20. Bipolar junction transistor
BJT structure =

21. Bipolar junction transistor
BJT structure =

22. Contact methods for BJT’s Circuits
The electronic circuits often have a signal or voltage inside and another outside, and here in a BJT part of the three parts involved in each of the entrance and exit thus
common emitter configuration
base common configuration
common collector configuration
The figure for (npn) type, however for the other type (pnp) just reverse the arrow =

23. Currents and voltage and symbols in circles BJT
IB Base current IE Emitter current IC Collector current
Always gather those three by relationship IE = IB + IC
VBE voltage between base & emitter VBC voltage between base & collector
VCE voltage between emitter & collector
Distribution in the two types npn & pnp
W The length of the first depletion region between base and emitter
W2 The length of the second depletion region between base and collector
WB The length of the base region =

24. Currents and voltage and symbols in circles BJT
IB Base current IE Emitter current IC Collector current
Always gather those three by relationship IE = IB + IC
VBE voltage between base & emitter VBC voltage between base & collector
VCE voltage between emitter & collector
Distribution in the two types npn و pnp
In electronic circuits for system method for contact transistor we need to know
Vin Input voltage Vout Output voltage
Rin Input resistance Rout Output resistance (often called load resistance RL ) =

25. Band Energy Description of BJT at equilibrium Conditions to npn & pnp
In the first figure
in equilibrium condition for npn,
the second figure for pnp
In two figures, we notice
Fermi level stability along
across emitter, base &
collector.
It must be recalled that the contact
potential between emitter and base junction higher than the contact
potential between , base and
collector junction . This is because impurities in emitter higher than impurities in base
and collector. = E C B P n+ n Ec Ef Ev P+ P n

26. forward bias reverse bias
Band Energy Description of BJT at non equilibrium Conditions to npn & pnp
In the first figure in non
equilibrium condition
for npn, the second
figure for pnp
In two figures, we notice
Fermi level variable along
across emitter, base &
Collector duo to forward
and reverse bias.
We will see in detail what is
happening in the diffusion of electrons
and holes and also the recombination
process in BJT in the next topics. = Ec Ev E C B P n+ n Ef
forward bias reverse bias P P+ n

27. Modes of Operation for BJT
We saw that in equilibrium condition there will be two case of the forward and reverse bias. thus there will be four modes of operation BJT (we will only mention now)
Active mode :
The forward bias in base & emitter junction. The reverse bias in base & collector junction.( which often we will take about)
Saturation mode :
The forward bias in two junctions. the transistor in this case be a maximum connection status and operates as if it is closed switch in a circle
Cut – off mode :
The reverse bias in two junctions. the transistor in this case only leaking current passes in circle and operates as if it is open switch in a circle
Inverted mode :
The reverse bias in base & emitter junction. The forward bias in base & collector junction

28. Bipolar junction transistor
What happens inside transistor
At the beginning, we deal with Active mode and base common configuration to npn. We notice that in forward bias between base & emitter junction, the length of the depletion region W1 is small unlike the length of the depletion region between base & collector junction W2 is big. Also, we care about the thickness of base WB is small.
At base & emitter junction (np), the diffusion of electrons from emitter to base and opposite for the diffusion of hole from base to emitter. If the thickness of base WB is small, the diffusion of electrons from emitter to base complete its way to collector = - + W1 W2

29. What happens inside transistor
At the beginning ,electrons inject in emitter then diffuse to base and part of electrons recombine with holes. In return, holes inject in base then diffuse to emitter which know base current. However, we must remember that the emitter and base junction n+p has more impurities in emitter therefore most junction current in forward bias will be from electrons (electronic current). As we mentioned earlier, if the thickness of base is small, electronic current will not be able to recombine with all majority carrier (holes) in base. =

30. What happens inside transistor
Thus, most electronic current will withdraw or diffused to base and collector junction pn (also, reverse voltage effects in diffusion process which lead to the fall of electrons in energy well). This is followed by the appearance of equivalent region inside base as we move away from two junctions region toward the center, if concentration of impurities’ injection regular, the base region will be free of electronic field and charge carrier will be driven by diffusion power.
Also, base current IB creates from recombination some of electrons which inject with holes in base region (IB considers of most important current). In addition, there are small weak currents such as reverse leakage current Icp of hoes in base and collector junction . =

31. what happen inside transistor
Also, from the figure we should know
IEn Total electronic current emit from emitter
ICn Residual part of total electronic current emit from emitter and collect in collector
IEn - Icn Residual part of total electronic current emit from emitter and flow in base as recombination current
IEp hole current at base current and it creates from holes inject in base to emitter
Icp hole current as reverse leakage current direction from collector to base =

32. Transistor parameters
Previously we mentioned that WB the thickness of base plays very important role in efficiency transistor ( two possibilities)
1- WB ≈ Ln or Lp (The diffusion length of electron and hole depending on the type of transistor npn or pnp, respectively ) is small, as we mentioned early, so a few amount of charge carrier recombine with other type of carrier . Thus, efficiency transistor increases, in addition to injection of emitter from a number of charge carrier to base so it requires(high doping of emitter as n+ or p+ ) =

33. Transistor parameters
2 - WB >>Ln or Lp (The diffusion length of electron and hole depending on the type of transistor npn or pnp, respectively ), the thickness of base is big.
Therefore, any charge carrier which inject from emitter to base will recombine with other type of carrier in base before going to collector . Thus, the only current in base and collector junction is reverse leakage current or reverse saturation current ICBO and no passing of other current in base and collector junction and become two open circles

34. How amplification occurs in the transistor
Here also, we deal with npn type and active mode but we now use emitter common configuration . When hole current enters from base, potential reduce between emitter and base (forward bias). If WB the thickness of base is small, we will assume that % 1 of electronic current recombine with hole current in base and 99% of electronic current go toward collector
Therefore, output current from collector IC
almost 99% higher from base current IB
Thus, we can say when a small amount of
current enters of IB , it will create high
current of IE also of IC because most
electronic current go from emitter to
collector. We can say IE ≈ IC =