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SIGNAL TRAINING SCHOOL – BORDER SECIRITY FORCE - TIGRI

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Presentation on theme: "SIGNAL TRAINING SCHOOL – BORDER SECIRITY FORCE - TIGRI"— Presentation transcript:

1 SIGNAL TRAINING SCHOOL – BORDER SECIRITY FORCE - TIGRI
M.O.I Flip-flops An introduction

2 Introduction - flip flops
Flip-flops are synchronous bi-stable devices. The term synchronous means the output changes state only when the clock input is triggered. That is, the changes in the output occur in synchronization with the clock.

3 Necessity Need for active storage devices like RAMs, and synchronization in the operations of sequential digital circuits led to the invention of Flip-Flops.

4 History of flip-flops The first electronic flip-flop was invented in 1918 by the British physicists William Eccles and F. W. Jordan. It was initially called the Eccles–Jordan trigger circuit and consisted of two active elements (vacuum tubes). The design was used in the 1943 British Colossus codebreaking computer and such circuits and their transistorized versions were common in computers even after the introduction of integrated circuits, though flip-flops made from logic gates are also common now.

5 TYPICAL NAND GATE USING DIODES & BJTs.
Diodes and BJTs are used to form this logic circuit. The adjoining fig. gives the symbol, truth table & schematic circuit of a typical DTL IC NAND gate. It is clear that if one or more of the inputs (A-D) are grounded (0 state), the current through the 2KΩ input resistor will be returned to ground. This eliminates the base drive for output transistor Q, so that it is turned OFF. For this case the output is in 1 state. A unique input condition occurs when all the inputs are high, the current will then flow through the input resistor and the two stand out diodes (D5, D6) into the base of Transistor Q, which turns ON Q, taking it to the saturation, i.e. Output is zero level. Thus the circuit performs the positive NAND function.

6 NAND GATE USING DIODES & BJTs
If any or all of the inputs (A,B,C,D,X) are low (logic 0), the output (y) will be high (logic 1). In a unique condition, if all of the inputs are high (logic 1), the output (y) will be low (logic 0). i.e. Y=0, if and only if A=B=C=D=X=1, In all other logics, Y=1. y

7 What is a flip flop? In digital circuits, the flip-flop, is a kind of bi-stable multi-vibrator. It is a Sequential Circuit / an electronic circuit which has two stable states and thereby is capable of serving as one bit of memory , bit 1 or bit 0. Flip-flops and latches are fundamental building blocks of digital electronics systems used in computers, communications, and many other types of systems. All flip-flops can be divided into four basic types: SR, JK, D and T. They differ in the number of inputs and in the response invoked by different value of input signals. The four types of flip-flops are defined in this presentation.

8 What is a latch? Set Output Reset
In digital electronics, a latch is an electronic logic circuit that has two inputs and one output. One of the inputs is called the SET input; and the other is called the RESET input. Latch circuits can be either active-high or active-low. The difference is determined by whether the operation of the latch circuit is triggered by HIGH or LOW signals on the inputs. Active-high circuit: Both inputs are normally tied to ground (LOW), and the latch is triggered by a momentary HIGH signal on either of the inputs. Active-low circuit: Both inputs are normally HIGH, and the latch is triggered by a momentary LOW signal on either input.

9 What is a latch? In an active-high latch, both the SET and RESET inputs are connected to ground. When the SET input goes HIGH, the output also goes HIGH. When the SET input returns to LOW, however, the output remains HIGH. In other words, the latch remembers that the SET input has been activated. If the SET input goes HIGH for even a moment, the output goes HIGH and stays HIGH, even after the SET input returns to LOW. The output returns to LOW only when the RESET input goes HIGH.

10 What is a latch? On the other hand, in an active-low latch the inputs are normally held at HIGH. When the SET input momentarily goes LOW, the output goes HIGH. The output then stays HIGH until the RESET input momentarily goes LOW.

11 Clock signal Sequential logic circuits have memory.
Output is a function of input and present state. Sequential circuits are synchronized by a periodic “clock” signal. When the clock changes from a LOW state to a HIGH state, this is called the positive-going transition (PGT) or positive edge triggered. When the clock changes from a HIGH state to a LOW state, it is called negative going transition (NGT) or negative edge triggered. Fig . A clock signal consists of periodic logic 1 pulses.

12 Sr (set-reset) flip-flop:

13 Sr (set-reset) flip-flop:
When clock input is high and both set and reset inputs are high, the SR flip-flop jumps into an invalid state, because Q can never be equal to Q-bar. This is a limitation in SR flip-flop.

14 D Flip-flop A D flip-flop is nothing but a modification over clocked SR flip-flop. In this flip-flop, one input is complimented to the other input to avoid not-used condition in SR flip-flop.

15 D Flip-flop Properties of D flip-flop:
No worry of condition for S=R=1, because of inversion, it is never possible. Most frequently used flip-flop for data storage, e.g. calculators.

16 JK Flip-flop

17 Race-around condition
JK Flip-flop Race-around condition Here, in the above circuit, we want to make use of the 'not used’ condition that occur in SR flip-flop, so we used a three input NAND gate instead of two input NAND gate, with one of the inputs as a feedback from the previous output. Characteristic table for JK flip flop: (assume that initially Q=0 and Q’=1) Case 1: Clock=1, J=0, K=0, Q=Q, Q’=Q’ (Memory state) Case 2: Clock=1, J=1, K=0, Q=1, Q’=0 Case 3: Clock=1, J=0, K=1, Q=0, Q’=1 Case 4: Clock=1, J=1, K=1, Q=1,0,1,0,1,… Q’=0,1,0,1,0,… The above condition in Case 3, is called as Racing or race-around.

18 JK Flip-flop The main difference between a JK flip-flop and an SR flip-flop is that in the JK flip-flop, both inputs can be HIGH. When both the J and K inputs are HIGH, the Q output is toggled, which means that the output alternates between HIGH and LOW. Thereby the invalid condition which occurs in the SR flip-flop is eliminated.

19 T-flip flop The T or "toggle" flip-flop changes its output on each clock edge, giving an output which is half the frequency of the signal to the T input. It is useful for constructing binary counters, frequency dividers, and general binary addition devices. It can be made from a J-K flip-flop by tying both of its inputs high. Clock T Qn+1 X Qn 1

20 Applications of flip flops
Some of the most common applications of flip – flops are Counters Registers Frequency Divider circuits Data transfer All these applications make use of the flip – flop’s clocked operation. Almost all of them come under the category of sequential circuits.

21 Thanks


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