1. A Toolbox for Counter-Example Analysis and Optimization
Robert Brayton Niklas Een Alan Mishchenko
Berkeley Verification and Synthesis Research Center
Department of EECS
UC Berkeley

2. Overview Counter-examples (CE) are essential for debugging
Analysis and optimization of CEs makes them
more explicit (containing only relevant information)
shorter (taking fewer cycles from the initial state to the failure)
In this paper, we concentrate on the first task – making CEs more explicit
The main goal is to facilitate design debugging
a typical CE contain only 5-10% of relevant information
The secondary goal is to gather information needed for
making counter-examples shorter
making CE-based abstraction more efficient. 2

3. Key Idea
A counter-example (CE) is a set of PI values in each time frame, which leads to the property failure
Given a CE, PI values can be divided into three categories
Essential PIs whose values are needed for the property failure
Don’t-care PIs whose values are not important
Optional PIs (all the remaining ones)
We introduce the notion of CE-induced network
This network, composed of two-input AND-/OR-gates, has unate Boolean function in terms of PI variables, which represents all subsets of the PIs implying the property failure according to the CE
Applications
Design debugging, abstraction refinement, CE depth minimization

4. Construction of CE-Induced Network
Unfolding
Unfold the original network for the depth indicated by the CE
Assign values of primary inputs and internal nodes according to the CE
Replace all primary inputs of the unfolding by free variables
Replace each AND of the unfolding by AND, OR or BUF using the rules
Rehash and sweep dangling nodes 1   1 

5. Experiment: CE Bit Profiling
Engine: Formal verification engine that produced counter-example
Total bits: The total number of primary inputs in the unrolled testcase
DC/Opt/Essen: Percentage of don’t-care, optional, and essential bits
Min: Percentage of bits in the minimized counter-example
Time: Runtime of bit profiling in seconds

6. Experiment: Bounded Unfolding vs. CE-Induced Network
CE Depth: The timeframe where the property fails according to the CE
PI/AND/Level: The number of PIs, AIG nodes, and AIG node levels
Time: Runtime of unfolding vs. constructing CE-induced network, in seconds

7. Conclusion Don’t-care, essential, and optional bits can be computed
CE-induced network is a symbolic representation of all justifying subsets
Because the size of the CE-induced network is substantially smaller than the size of the bounded unrolling, it can compactly represent sets of the states, for which the trace to the property failure is known
Future work will focus on
developing methods for CE depth minimization
improving abstraction refinement using the notion of the CE-induced network