1. Timing Product Overview
Q4 2016

2. Silicon Labs Timing Solutions Lead the Industry
XO/VCXO
Any frequency with ultra-low jitter
Short lead times
Clock Buffers
Integrated format/level translation
Simplified clock distribution
Any-frequency, any-format, any-output
Simplified clock synthesis
Clock Generators
Any-frequency translation with jitter cleaning
High performance ultra-low jitter clocking
Jitter Attenuating Clocks
When you are already helping a customer with their design, there will always be an opportunity for timing. Silicon labs is a one-stop shop for you to create a clock tree. You do not need to think or try to remember which of your line cards has what timing function, because whatever you need, we have a clock for that.
Industry’s lowest jitter SyncE clocks, 1588 DCO
Single and multi PLL options available
Synchronization
Industry’s most highly integrated jitter attenuators
No external VCXO, filters, LDOs
Wireless

3. Silicon Labs XO/VCXOs Any frequency from 100kHz – 1.4GHz
Standard packages / footprints
Ultra-low jitter
High power supply noise rejection
Easy web-based part number creation
High quality, 100% tested
Short lead times: 2-4 weeks
Silicon Labs crystal oscillators make use of the DSPLL IP in order to synthesize any frequency from 100 kHz to 1.4 GHz. Using the DSPLL these oscillators can provide low phase jitter frequency sources with better than 0.3 ps RMS (or better than 300 femtoseconds).
Data Center
Networking
Switches/Routers
Video

4. Any-Frequency Clocking Enables Single IC Clock Trees
Conventional Approach
Silicon Labs Solution
Challenges
FPGA/ASIC/PHY require diverse mix of frequencies, formats
High-speed 10G+ clocks require very low jitter
Solution
MultiSynth generates any combination of frequencies
Best-in-class jitter: 100 fs RMS
4–10 clock outputs

5. Silicon Labs Clock Generators
Application
Part
Number
# Diff
Outputs
Output Formats
Max Output Frequency
RMS Phase Jitter
Communication Data Center
Industrial
(10/40/100GbE)
Si5340/1
4 or 10
LVDS, LVPECL, HCSL, CML, LVCMOS
1028 MHz
100 fs
(incl. GbE)
Si5335/8 4
710 MHz
700 fs
PCIe Gen 1/2/3/4
Si52111/2
Si52144/6/7
1, 2, 4, 6, 9
HCSL
100 MHz
1 ps
Si52142/3
3, 5
HCSL and LVCMOS
25 MHz/100 MHz
Industrial, Audio/Video, Consumer
Si5350/1
3 or 8
LVCMOS
200 MHz -
Si512xx
1/2/3
165 MHz
Performance

6. Si5341/40 Low Jitter Any-Frequency Clocks
Part Number
Clock Inputs/ Outputs
Input
Frequency (MHz)
Output
Frequency
(MHz)
Phase
Jitter
(fs RMS)
PLL Bandwidth
Package
Si5340
4/4
10 to
750 MHz
0.001 to
1028 MHz
100
integer;
140
fractional
1 MHz
Q44FN 7x7mm
Si5341
4/10
6Q4FN 9x9mm
Optical networking
Servers / storage
Wireless infrastructure
Broadcast video
ANY input frequency to ANY combination of output frequencies
100 fs (int); 140 fs (frac) RMS phase jitter (12kHz -20MHz)
Configurable outputs: LVPECL, LVDS, LVCMOS, HCSL, CML
Glitchless, dynamic on-the-fly output frequency switching
Customizable using ClockBuilder Pro
-40⁰C to +85⁰C operation
The any-frequency, any-output Si5341/40 clock generators combine a wide-band
PLL with proprietary MultiSynth fractional synthesizer technology to offer a
versatile and high performance clock generator platform. This highly flexible
architecture is capable of synthesizing a wide range of integer and non-integer
related frequencies up to MHz on 10 differential clock outputs while
delivering sub-150 fs rms phase jitter performance and 0 ppm error. Each of the
clock outputs can be assigned its own format and output voltage enabling the
Si5341/40 to replace multiple clock ICs and oscillators with a single device
making it a true “clock tree in a chip”.
The Si5341/40 can be quickly and easily configured using ClockBuilder Pro
software. Custom part numbers are automatically assigned using a
ClockBuilderPro for fast, free, and easy factory programming, or the Si5341/40
can be programmed in-circuit via I2C and SPI serial interface.

7. Si5335/38 Any-Frequency Clocks
Features
Generates any combination of frequencies
Proprietary low jitter MultiSynth architecture
700 fs RMS phase jitter (12kHz -20MHz)
Custom versions available in 2 weeks
Enables simplified clock synthesis
Applications
Communications
Data Center
Industrial
Ethernet
Storage

8. Si521xx PCIe Clock Generators
Si52112 Tiny PCIe Clock
Si52144 PCIe Clock Generator
Smallest PCIe clock generators!
PCIe Gen 1/2/3 compliant
1 and 2-output devices
Small form-factor TDFN
Low cost, high volume apps
Family of 2,4,6,9-output devices
PCIe Gen 1/2/3 compliant
Push-pull output drivers reduce power and external components
I2C provides signal tuning capability
Individual OE pin per output
The Si5315x PCIe Clock Buffer products are a family of off-the-shelf solutions that provide either 2, 4, 6 or 9 PCIe Gen 1/2/3 compliant HCSL outputs per device. The Si5315x PCIe clock buffers family carries over all the features from our Si5214x clock generator family. These are non-PLL based buffers, which further reduce power consumption. No terminations are required on the input or output. For ease-of-use, output enable control pins are provided for better power management by enabling or disabling each output. The Si5315x clock buffer family supports the fanout of an externally provided HCSL or LVCMOS input clock with frequencies up to 200 MHz. An example of the Si53154 quad PCIe outputs is shown above. The clock buffer products provide an I2C interface that allows signal integrity tuning of clock edge rates and skew for the differential true and compliment outputs.

9. Push Pull Architecture Saves Space & Power
Traditional Constant-Current Driver
Silicon Labs Push-Pull Driver
Silicon Labs Benefits
60% lower power
Eliminates four resistors per output
Small QFN package sizes
Simplified PCB layout
Silicon Labs’ low-power HCSL output buffer architecture has clear advantages over older technology constant current mode technology. Silicon Labs’ PCIe devices not only provide up to 66% power savings, but they also reduce required component count per output! It’s a win-win.
The benefits of low-power push-pull HCSL output drivers are threefold:
More than 66% reduction in power consumption, which in turn presents operating cost reductions to end customers
A reduction in external components needed (Four resistors per output clock), plus an IREF resistor
Smaller PCB footprint. The combination of small form factor packaging and elimination of external resistors = smaller total PCB area needed
In addition, elimination of the external resistors enables layout of a clean transmission line from the output of the device to the input of the receiver, simplifying board design and eliminating discontinuities in the clock transmission line that can degrade signal integrity.
Architecture not power-optimized
Increased PCB layout complexity, cost

10. Si5350/51 Any-Frequency LVCMOS Clocks
Features
Up to 8 unique frequencies, 8 kHz-200 MHz
Proprietary low jitter MultiSynthTM architecture
Low period jitter: 100 ps pk-pk
Configurable SSC per output
Glitchless frequency shifting for A/V clocking
Applications
Digital Imaging
Consumer Audio
Handheld Industrial
Print Imaging

11. Si5121x Low Power “Tiny Clock”
Features
Industry’s smallest programmable clock: 1.4 x 1.2 mm
Very low power: 2.5 mA
Optional center spread spectrum: ±0.25 to ±1.0%
Selectable rise/fall time per clock output
ClockBuilder Pro support
Applications
Device
Package
Output
Freq .
(MHz)
Inputs / Max # Outputs
VDD
Si51210
6 TDFN 1.4x1.2mm
3-200
1/2 V
Si51211
8 TDFN 1.6x1.4mm
1/3
Si51214
3-133
1.8V
Si51218
Si51219
8 TSSOP
We’ve had Tiny Clock available for a few years now and have seen some wildly successful design wins. It is the smallest clock generator family in the market. Until recently, we’ve restricted selling tiny clock to MOQ levels >50K/yr, but today we are announcing that we are going to reduce that down to 25K/yr EAUs. Please revisit customers you may not have promoted this product to in the past, and see if we can get a Tiny Clock on the customer’s next board design spin.
The real value proposition of Tiny Clock is:
Replacing 2-3 crystals and/or oscillators
It helps reduce board space
It helps reduce BOM cost
And it offers additional capabilities not offered by a quartz solution, such as spread spectrum, OE control, and frequency selection.
So you will want to target the customers where board space is a big concern, or cost is a big concern.
And remember, a key advantage of Tiny Clock is that it is a programmable solution. We can program a part using the customer’s required frequencies and take char data within a day or two, and provide samples in 1-2 weeks! Often times when we offer to take char data for the customer given their frequencies, they are much more likely to use the solution.
Gateways
Handheld
IP Telephone

12. Si5330x Universal Clock Buffers
Features
Integrated format translation
Ultra-low additive jitter
Integrated muxes, dividers, level shifters
Simplified clock distribution
Applications
Communications
Consumer Audio/Video
Industrial
Ethernet
Embedded
Mil/Aero

13. PCIe Buffer/Zero Delay Buffers
Features
PCIe Gen1/2/3 Compliant
2/4/6/8/12/15/19-output devices
Intel qualified zero-delay buffers
Low power, reduced external resistors
Applications
Server/Computing
We introduced a family of PCIe Gen3 buffers specifically targeting customers using Intel Xeon CPU platforms in 2014, primarily for server, storage, and datacenter
This family of products is slightly differentiated from our existing portfolio, because to participate in this business you have to be an approved supplier by Intel. Intel writes their own specifications, which they refer to as white-cover or yellow-book. End customers will only use these devices if they have been approved by Intel.
In the table, we have highlighted the 3 devices in red that correlate to Intel white cover specifications. The other devices are just different number of outputs. As of today, our Si53108 and Si53112 have been fully approved by Intel for the DB800ZL and DB1200ZL specifications. These devices use the Push-Pull technology that we just talked about, and offer a huge power savings over constant current mode. Nearly all customers are using IDT’s constant current devices today, so we want to promote the huge amount power savings that our devices have to offer. As an example, our Si53119 can save nearly 1W of power consumption compared to IDT9ZX21901…
The last device in the table is a constant-current device. We just highlighted the disadvantages of constant current mode, so why offer this device? Well, turns out this is the most widely used device in servers/storage today, primarily because that is the one Intel uses on their reference designs. So offering the 19-output constant current mode device allows us to get into the market quickly as a second source alternative to IDT, while at the same time we promote the benefits of a push-pull version for the next design cycle. Either way, we have the opportunity win the socket. Intel has agree to qualify our Si53019 as a source for DB1900Z, we expect to be have our approval for our Si53019 device by September for the DB1900Z specification.
All of the devices shown here are pin-compatible and functional compatible to the IDT part numbers in the last column. We’ll be putting a lot of collateral and tools together for this product launch to make it very easy to walk into customers and start stealing market share and sockets away from IDT, look for the product launch in November and contact Kyle if you need anything before then.
Storage
Network Security
Adapter Cards
Co-Processors

14. Clock Buffer Family Performance Application Part Number # Diff Outputs
Output Formats
Output
Phase Jitter
Communication Data Center
Industrial
(10/40/100GbE)
Si533xx
2 to 10
LVCMOS, LVDS, LVPECL, HCSL, CML
1.2GHz
100 fs RMS
PCIe Gen 1/2/3/4
Si5315x
2, 4, 6, 9
HCSL
MHz
0.2 ps
Si531xx
6, 8, 12, 15, 19
100/133MHz
0.7 ps
Industrial, Audio/Video, Consumer
SL23xx
4, 5, 8, 9
LVCMOS
Up to 200MHz
250 ps
SL23EPxx
Performance

15. Frequency Flexible Jitter Attenuators
Part Number
Clock Inputs/ Outputs
Input
Frequency (MHz)
Output
Frequency
(MHz)
Phase
Jitter
(fs rms)
PLL
Bandwidth
Package
Si5342
4/2
0.008 to
750 MHz
0.001
800 MHz
< 100 integer
< 150
fractional
0.1 Hz
4 kHz
44QFN 7x7mm
Si5344
4/4
Si5345
4/10
64QFN 9x9mm
ANY input frequency to ANY combination of output frequencies
<100 fs phase jitter (integer); <150 fs (fractional)
Jitter/wander attenuation (down to 0.1 Hz)
Automatic hitless input switching
DCO mode (down to ppb steps)
Free-run, locked, holdover; status monitoring: LOL, LOS, OOF
These jitter attenuating clock multipliers combine fourth-generation DSPLL and
MultiSynth™ technologies to enable any-frequency clock generation and jitter
attenuation for applications that require the highest level of jitter performance.
These devices are programmable via a serial interface with in-circuit
programmable non-volatile memory (NVM) so that they always power up with a
known frequency configuration. They support free-run, synchronous, and
holdover modes of operation, and offer both automatic and manual input clock
switching. The loop filter is fully integrated on-chip eliminating the risk of potential
noise coupling associated with discrete solutions. Further, the jitter attenuation
bandwidth is digitally programmable providing jitter performance optimization at
the application level. Programming the Si5345/44/42 is made easy with Silicon
Labs’ ClockBuilderPro software. Factory preprogrammed devices are also
available.

16. Silicon Labs Jitter Attenuators
Application
Part
Number #
PLLs
Multi-Synth
# Diff
Outputs
Max Input
Max Output Frequency
PLL Bandwidth
Communications
Broadcast Video
Si5342/4/5 1
2/4/5
2/4/10
750MHz
712.5MHz
0.1Hz – 4kHz
Si5342/44H
1/2
2/4
2.7GHz
Si5346/7 -
4/8
Network Synchronizers
(SyncE/1588)
Si5348 3 7
(1PPS)
0.001Hz – 4kHz
Wireless Infrastructure
Si538x 12
480kHz – 1.47GHz
10Hz – 4kHz