1. ILD Silicon Tracking Status Report
ILD ECFA-LCWS2016, Santander
June 4th, 2016
Iván Vila
Instituto de Física de Cantabria (CSIC-UC)

2. Outline Reminder: DBD baseline and involved groups. Strategy post-DBD.
Prototyping:
FTD proof-of-concept demonstrators, full scale thermal model , pulse powering
R&D on high precision tracking
Detector description & software simulation
Outlook
Santander, June 6th 2016

3. DBD baseline:  3 years ago.
Santander, June 6th 2016

4. Players Physics groups Technological Centers
Instituto de Física de Cantabria (IFCA)
Instituto Tecnológico de Aragón (ITA)
Centro Nacional de Microelectrónica de Barcelona (CNM-IMB)
Universidad de Barcelona (UB)
Instituto Nacional de Tecnicas Aeronauticas
Instituto de Física Corpuscular (IFIC)
Physics groups
Technological Centers
Santander, June 6th 2016

5. Fairly detailed description( 3 years ago )
Main services for FTD.
Component
Nº Cables
CABLE NEEDED
Power dissipated (W/m)
Total Cu section
DC-DC solution
1/4 DISK
4 X 12v-1.25 V DC-DC 2
AWG 15
0.093
3.3 mm2
2 X 12V-2.5V DC-CD
High voltage cable
AWG 24
0.000
0.4 mm2
TOTAL 4
3.7 mm2
All DISK
DC-DC-s 8
AWG15
0.373
13.2 mm2
AWG24
1.6 mm2 16
14.8 mm2
Super Capacitor solution
2 supercapacitors
AWG 16
0.040
2.6 mm2
3 mm2
Supercapacitors
0.16
10.4 mm2
12mm2
Santander, June 6th 2016

6. How things evolved since the DBD?
- All the activity focused on the Forward Tracker Disks.
No news concering the other silicon subdetectors.
Santander, June 6th 2016

7. DBD follow-up strategy
The overall Si Tracker DBD design becoming more and more within the reach of the current State-of-the-Art Si tracking technology.
Development of system-wise aspects specific for ILD, not likely to be tackled by other communities (LHC, non-accelerator, SuperB factories,…)
To accomplish this assignment:
Non-active and/or small footprint and light cooling system: power pulsing and low consumption FE
Increase momentum resolution: Material Budget reduction & hit position resolution increase
Follow up RD on pixels for two innermost FTD disks
Santander, June 6th 2016

8. Prototyping: FTD Full scale mock-up
Including optical fibers
Sensors for monitoring
Santander, June 6th 2016

9. Prototyping: FTD Full scale mock-up
Santander, June 6th 2016

10. Prototyping: Power system
The idea of use supercapacitors as part of the power supply distribution system
Minimize the transients present in the system
A real prototype of 1 Group of FTD sub-detector (FTD +6)
developed
Ip=13.5A – Isb =2.7A (Per petal – Ip=3.4A / Isb=0.7A)
Santander, June 6th 2016

11. R&D Microstrip sensors with integrated gain
Integrated gain to reduce sensor thinkness (smaller multiple scattering ) and increase intrinsic point resolution.
Keep and eye on depleted CMOS technology evolution
Santander, June 6th 2016

12. R&D Microstrips: LGAD and I-LGAD
Santander, June 6th 2016

13. Detector description and Simulation software
No change on detector description since the DBD (DBD quotes wrong geometrical values for SIT, collision with FTD inner disks)
M. Vos as software contact.
We need to reinforce (start) collaboration with TPC reconstruction.
Severe lack of man power on detector validation
Santander, June 6th 2016

14. Outlook: What to expect in the next two years
Covering of critical system aspects:
Engineering activities (system integration, realistic designs, services “well” covered)
R&D will proceed with limited resources.
Team up with vertex and TPC communities to achieve the goals.
Outstanding issues:
Lack of man power for detector validation (critical) and optimization (bonus)
External silicon tracker role: EDT and SET
Timing requirements.
Santander, June 6th 2016

15. THANKS !
Santander, June 6th 2016