1. HPC@Intel Platforms and Technology CCGSC September 10, 2006 Dr
Platforms and Technology CCGSC September 10, Dr. David Scott Petascale Product Line Architect

2. Legal Disclaimer
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3. New HPC focused platforms Technologies for the future
AGENDA
New Processors
New HPC focused platforms
Technologies for the future

4. Let’s Take A Look Inside
Core-Duo™ Processors
Let’s Take A Look Inside

5. Historical Driving Forces
Increased Performance
via Increased Frequency
Shrinking Geometry
Feature
Size
(um)
Frequency
(MHz)
1946
20 Numbers in Main Memory
1971
I4004 Processor
2300 Transistors
2005
65nm
1B+ Transistors

6. Diminishing Voltage Scaling Power = Capacitance x Voltage2 x Frequency
The Challenges
Power Limitations
Diminishing Voltage Scaling
CPU Power (W)
Supply Voltage
(V)
Power = Capacitance x Voltage2 x Frequency
also
Power ~ Voltage3

7. Intel® Core™ Microarchitecture
Low Power
High Performance
Scalable
Woodcrest
Intel® Wide Dynamic Execution
Intel® Intelligent Power Capability
Intel® Advanced Smart Cache
Intel® Smart Memory Access
Intel® Advanced Digital Media Boost
Server Optimized
Conroe
Desktop Optimized
65nm
Merom
Mobile Optimized
*Graphics not representative of actual die photo or relative size

8. Intel® Wide Dynamic Execution
EACH CORE
CORE 1
CORE 2
EFFICIENT
14 STAGE
PIPELINE
INSTRUCTION FETCH
AND PRE-DECODE
INSTRUCTION FETCH
AND PRE-DECODE
DEEPER
BUFFERS
INSTRUCTION QUEUE
INSTRUCTION QUEUE
4 WIDE -
DECODE TO
EXECUTE
DECODE
DECODE
4 WIDE -
MICRO-OP
EXECUTE
RENAME / ALLOC
RENAME / ALLOC
MICRO
and
MACRO
FUSION
RETIREMENT UNIT
(REORDER BUFFER)
RETIREMENT UNIT
(REORDER BUFFER)
SCHEDULERS
SCHEDULERS
ENHANCED
ALUs
EXECUTE
EXECUTE

9. Intel® Intelligent Power Capability
Ultra
Fine
Grained
Coarse
Grained
Process
Transistor
65nm
Strained Silicon
Low-K Dielectric
More Metal Layers
Aggressive
Clock Gating
Enhanced
Speed-Step
Low VCC Arrays
Blocks Controlled
Via Sleep
Transistors
Low Leakage
Transistors
Sleep
*Graphics not representative of actual die photo or relative size

10. Intel Performance Leadership for Life Sciences
“Woodcrest” single thread relative performance compared to Opteron*
Intel outperforms AMD across
all applications tested
Higher is better
Computational Chemistry
Bioinformatics
Source: Intel Internal Measurement
* Other brands and names may be claimed as the property of others.
(1) Woodcrest: Dual-Core Intel® Xeon® processor, 2-socket sys., 3.0GHz, 4MB L2 cache, 4GB Memory
(2) Woodcrest: Dual-Core Intel® Xeon® processor, 2-socket sys., 3.0GHz, 4MB L2 cache, 8GB Memory
(3) Woodcrest: Dual-Core Intel® Xeon® processor, 2-socket sys., 3.0GHz, 4MB L2 cache, 16GB Memory
(4) Dual-Core AMD* Opteron* processor 280, 2-socket sys. 2.4GHz, 1MB L2 cache, 16GB Memory
(5) Dual-Core AMD* Opteron* processor 285, 2-socket sys. 2.6GHz, 1MB L2 cache, 4GB Memory
(6) AMD* Opteron* processor 252, 2-socket sys. 2.6GHz, 1MB L2 cache, 16GB Memory
Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel® products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, reference or call (U.S.) or

11. Core™ Microarchitecture Advances With Quad Core
Efficient
Performance
Energy
Quad Core 4X
Clovertown
H1 ‘07
Clovertown
Woodcrest 3X
H2 ‘06
Server 2X
Dempsey MV
H1 ‘06
Paxville DP
H2 ‘05
Kentsfield
Irwindale
H1 ‘05 1X
Desktop
DP Performance Per Watt
Comparison with SPECint_rate
at the Platform Level
Source: Intel®
*Graphics not representative of actual die photo or relative size

12. New HPC focused platforms Technologies for the future
AGENDA
New Processors
New HPC focused platforms
Technologies for the future

13. Motivation Caretta & Port Townsend: Atoka Metrics
Provide a higher memory BW / FLOP option than DP Xeon
Provide a less expensive option than DP Xeon
Atoka
High Density DP solution
Metrics
Performance
Core – we lead
Bus – close (depends on STREAM binaries etc) + 2x cache size
Performance / Watt
We lead
Performance / SqFt
We match
Performance / $

14. Caretta Features GbE Video ICH Memory MCH CPU HPC BOARD FEATURES
Single Intel® Pentium-D processor (Presler, Smithfield)
Support for Pentium4 (CedarMill)
Chipset: Mukilteo + ICH7
4 DIMM (max 8GB) - DDR2 533/667 with U-ECC
800 MHz FSB
Integrated 2 port SATA2 with RAID 0/1
2xGbE (TekoaE + Tabor)
2x USB2 external
Rear video & serial port
Internal headers: serial, 2xUSB2, I2C
Custom 5.95” x13”, 6 layer
Custom power connector
Client Management iAMT via TekoaE

15. PortTownsend Features
HPC BOARD FEATURES
Single Intel® PentiumD processor (Conroe, Kentsfield)
Chipset: Mukilteo2 + ICH7
4 DIMM (max 8GB) - DDR2 533/667 with U-ECC
1066 FSB
PCIex8 – support for IB MemFree card & SFF GbE card
Integrated 2 port SATA2 with RAID 0/1
2xGbE (Tekoa + TekoaE)
2xUSB2 external (crash cart)
Rear video & serial port
Internal headers: serial (3pin), 2xUSB2, I2C
Custom 5.95” x13” , 6 layer
Custom power connector
Client Management iAMT via TekoaE
GbE
PCI-E x8
ICH
Memory
MCH
CPU
VRD

16. AtokaV Features HPC BOARD FEATURES
Dual Intel® Xeon processor (WC, CTN)
Chipset: Greencreek + ESB2
8 FBD (max 32GB) - DDR2 533/667
1333 FSB
PCIex8 – slot
Mellanox IB 4x DDR single port down
Integrated 2 port SATA2 with RAID 0/1
2xGbE (Gilgal)
2xUSB2 external (crash cart)
Rear video & serial port
Internal headers: serial (3pin), 1xUSB2, I2C
Custom 6.5” x16.5”
Custom power connector
Client Management via IPMI module / GbE port
Support for 32Mbit flash & embedded Linux
VRD
CPU
CPU
MCH
Memory
ESB2
PCI-E x8
GbE IB

17. Pics
PortTownsend – 1U ‘side by side’ reference chassis

18. Pics
PortTownsend – 4U Blade Can
PortTownsend – AC Blade

19. New HPC focused platforms Technologies for the future
AGENDA
New Processors
New HPC focused platforms
Technologies for the future

20. Today’s Packaging Technology
Multi-Chip Package
Wire-Bonded Stacked Die
Flash
DRAM
CPU
DRAM
CPU

21. 3D Stacking Research Wafer Stacking
Metal lines on backside of thin wafer
Thru-Silicon Via
Top Thin Wafer
Bonding Interface
DRAM
CPU
Bottom Wafer
Bonding Structures
Source: Intel

22. 3D Stacking Research Die Stacking
Analog
Via
Die 7
Flash
Die 6
Die 5
DRAM
Die 4
Die 3
DRAM
Die 2
Die 1
CPU
Pkg. Substrate
Metal Pad
Source: Intel

23. Chip-to-Chip Signaling Challenge

24. The Opportunity of Silicon Photonics
Enormous ($ billions) CMOS infrastructure, process learning, and capacity
Draft continued investment in Moore’s law
Potential to integrate multiple optical devices
Micromachining could provide smart packaging
Potential to converge computing & communications
To benefit from this optical wafers must run alongside existing product.

25. Intel’s Silicon Photonics Research
First
Continuous
Silicon Laser (Nature 2/17/05)
1GHz (Nature ‘04) 10 Gb/s (‘05)
First: Innovate to prove silicon is a viable optical material

26. Silicon Photonics Laser Filter Modulator Passive Alignment CMOS
Circuitry
Photodetector

27. Silicon Photonics Future Vision
Chip-to-Chip
Interconnects
Data Center
Fabrics
Backplane and Display
Interconnects
Chemical
Analysis
Medical
Lasers

28. Q
& A