1. Digital Logic & Design
Dr. Waseem Ikram
Lecture 37

2. SR1 latch which stores the status of the REQ1, FLOOR1 and OPEN buttons

3. Simplified State table for Elevator Control for REQ1, FLOOR1 and OPEN inputs
Present State
Next State
SR1=0
SR1=1
W1(000) x
C1(100) C1 W1
UP(110)
W2(001) C2 DO
C2(101)
DO(111)

4. SR2 latch which stores the status of the REQ2, FLOOR2 and OPEN buttons

5. Simplified State table for Elevator Control for REQ2, FLOOR2 and OPEN inputs
Present State
Next State
SR2=0
SR2=1
W1(000) C1 UP
C1(100)
UP(110) x
W2(001)
C2(101) C2 W2
DO(111)

6. Modified Block diagram of the Elevator State Machine

7. The Next State Table based on SR1, SR2 and ARRIVAL inputs
Present State
Next State
SR1=0
SR1=1
SR2=0
SR2=1
ARRIVAL=0
ARRIVAL=1
W1(000) x
C1(100)
UP(110)
W2(001)
C2(101)
DO(111)

8. Pin Declarations of the Elevator Input and Output signals
CLK, !OLE Pin 1,11;
REQ1, REQ2 Pin 2,3;
FLOOR1, FLOOR2, OPEN, ARRIVE Pin 4, 5, 6, 7;
SR1, SR1_ Pin 16, 17 ISTYPE ‘com.buffer’;
SR2, SR2_ Pin 18, 19 ISTYPE ‘com.buffer’;
DOOR, MOTION, DIR Pin 12, 13, 14 ISTYPE ‘reg.buffer’;

9. State Definition of the Elevator Controller
CONSTATE = [DOOR, MOTION, DIR];
WAIT1 = ^B000;
CLOSE1 = ^B100;
UP = ^B110;
WAIT2 = ^B001;
CLOSE2 = ^B101;
DOWN = ^B111;

10. State diagram for the Elevator Controller
State_diagram CONSTATE
State WAIT1: if (SR2) then UP else CLOSE1;
State CLOSE1: if (SR2) then UP else if SR1 then WAIT1 else CLOSE1;
State UP: if (ARRIVE) then WAIT2 else UP;
State WAIT2: if (SR1) then DOWN else CLOSE2;
State CLOSE2: if (SR1) then DOWN else if SR2 then WAIT2 else CLOSE2;
State DOWN: if (ARRIVE) then WAIT1 else DOWN;

11. Equations for the latches SR1 and SR2
Equation Definition
CONSTATE.CLK = Clock;
SR1 = REQ1 # !DIR.FB & OPEN # DIR.FB & FLOOR1 # !SR1_;
SR1_ = (!DOOR.FB & !MOTION.FB & !DIR.FB) # !SR1;
SR2 = REQ2 # !DIR.FB & OPEN # DIR.FB & FLOOR2 # !SR2_;
SR2_ = (!DOOR.FB & !MOTION.FB & DIR.FB) # !SR2;

12. The Traffic signals and sensors at a Traffic Intersection

13. Flow chart of conditions which switch the state from NSG to NSY

14. Pin Declarations for the Input and Output pins to the Controller circuit
CLOCK, !OLE pin 1, 11;
NSSR, EWSR, LTIME, STIME pin 2, 3, 8, 9;
Q0, Q1, Q pin 17, 16, 15 ISTYPE ‘reg.invert’;
TMRST pin 14 ISTYPE ‘com.invert’;

15. State definitions for the Traffic Light Controller
TRSTATE = [Q2, Q1, Q0];
NSG = [ 0 , 0, 0];
NSY = [ 0, 0, 1];
NSY = [ 0, 1, 1];
NSR = [ 0, 1, 0];
EWG = [ 1, 1, 0];
EWY = [ 1, 1, 1];
EWY = [ 1, 0, 1];
EWR = [ 1, 0, 0];

16. State Diagram for the Traffic Light Controller
State Diagram TRSTATE
State NSG: if (!STIME) then NSG
else if (LTIME) then NSY
else if (EWSR & !NSSR) then NSG
else if (EWSR & NSSR) then NSY
else if (!NSSR) then NSG
else NSY;
State NSY: goto NSY2;
State NSY2: goto NSR;
State NSR: goto EWG;
State EWG: if (!STIME) then EWG
else if (LTIME) then EWY
else if (NSSR & !EWSR) then EWG
else if (EWSR & NSSR) then EWY
else if (!EWSR) then EWG
else EWY;
State EWY: goto EWY2;
State EWY2: goto EWR;
State EWR: goto NSG;

17. Equation Definition
CONSTATE.CLK = Clock;
SR1 = REQ1 # !DIR.FB & OPEN # DIR.FB & FLOOR1 # !SR1_;
SR1_ = (!DOOR.FB & !MOTION.FB & !DIR.FB) # !SR1;
SR2 = REQ2 # !DIR.FB & OPEN # DIR.FB & FLOOR2 # !SR2_;
SR2_ = (!DOOR.FB & !MOTION.FB & DIR.FB) # !SR2;

18. Recap

19. Elevator Controller

20. Elevator Controller
PLD Programming

21. Traffic Light Controller

22. Traffic Light Controller
PLD Programming

23. Digital Logic Design
Lecture 37