1. 241-440 Computer System Design Lecture 3
Wannarat Suntiamorntut

2. Arithmetic for Computer
Implementing the Architecture

3. The numbers Binary number (base 2) numbers are finite (overflow)
fraction and real number
negative number e.g., No MIPS subi instruction, addi can add a negative number

4. Possible Representations
Sign Magnitude One’s complement Two’s complement
000 = = = +0
001 = = = +1
010 = = = +2
011 = = = +3
100 = = = -4
101 = = = -3
110 = = = -2
111 = = = -1
Negative and Invert are different!

5. Addition & Subtraction
{ } = 0001
two’s complement
= 0001
Overflow
n-bit does not yield an n-bit number
0111
+ 0001
1000

6. Detecting overflow No overflow when add positive&negative
No overflow when signs are the same for subtraction
Overflow occur when :
- add two positives yield a negative
- add two negative gives a positive
- subtract negative from positive and get negative
- subtract positive from negative get a positive

7. Effect of Overflow Exception occur (Interrupt)
- control jumps to predefined address for exception
- Interrupted address is saved
Don’t always to detect overflow
- New MIPS instructions: addu, addiu ...

8. ALU
Build ALU support andi, ori instructions

9. Multiplexor
Select one of the inputs to be output, base on control input

10. ALU for Addition instruction
Cout = ab + bcin + acin
Sum = a xor b xor cin

11. ALU for Subtraction instruction
Two’s complement approach : just negative b and ADD

12. Supporting slt

14. MIPS Arithmetic Instruction format

15. Conclusion ALU in MIPS Use multiplexor to select output we want
efficiently perform subtraction using two’s complement
replicate 1-bit ALU to 32-bit ALU

16. Computation Problem :fast adder
32-bit ALU faster than 1-bit ALU?
Carry-lookahead adder
g = ab, p = a + b
c1 = g0 + p0c0
c2 = g1 + p1c1c2
c3 = g2 + p2c2c3
...

18. Part II : Lecture III

19. Multiplication 0010 (multiplicand) x 1011 (multiplier) ????

20. Unsign Combinational Multiplier

21. Multiplication : First Version (Unsign)

22. Multiplication : First Version (contd.)

23. Analyze First Version 1 clock per cycle
50 % of bit in multiplicand always = 0
=> 64-bit adder is wasted
0’s inserted in left of multiplicand as shifted
=> lead significant bits of product never changed once formed

24. Multiplication : Second Version

25. Multiplication : Second Version (Contd.)

26. Analyze Second Version
Product register wasted space that exactly matches size of multiplier
Combine Multiplier register and Product register

27. Multiplication : Third Version

28. Multiplication : Third Version (Contd.)

29. Analyze Third Version
2 steps per bit because multiplier & product combined
MIPS registers Hi, Lo are left and right half of product

30. Booth’s Algorithm

31. Example : 2 x 7

32. Example : 2 x -3

33. Shifter : 2 kinds

34. Part III : Lecture III

35. Divide

36. Divide : First Version

37. Divide : First Version (Contd.)

38. Analyze First Version 50% bits in divisor always 0
=>1/2 of 64-bit adder is wasted
=> 1/2 divisor is wasted
1 step cannot produce a 1 in quotient bit
=> Switch order to shift first

39. Divide : Second Version

40. Divide : Second Version (Contd.)

41. Analyze Second Version
Eliminate Quotient register by combining with Remainder as shifted left

42. Divide : Third Version

43. Divide : Third Version (Contd.)

44. Analyze Third Version
Do Analyze by yourself

45. Floating Point : IEEE754

46. Floating-point Representation
-0.75
= -3/4 = -3/22
= -11/ 22 = = -1.1x 2-1
= (-1)s x (1 + signifiand) x 2 (exponent-127)
= (-1) x ( ) x 2( )
S E M
1-bit 8-bit bit

47. Floating-point Addition
9.999 x x10-1
Step1 : Change exponent as :
1.610 x = x 101
Step2 : Add significands
9.999 (10)
(10)
(10)
Sum = x 101

48. Floating-point Addition
9.999 x x10-1
Step3 : correct it (normalization) :
x 10 1 = x 102
Step4 : Four digits for significand
1.002 x 102

49. Example Floating-point Addition
0.5 + ( )
0.5 = 1/2 = 1/21 = 0.1 x 20 = 1.00 x 2-1
= -7/16 = -7/24 =
= x 2-2
step 1 : x 2-1
step 2 : 1.0x ( x 2-1)=0.001 x 2-1
step 3 : 1.0 x 2 -4
step 4 :

50. Multiplication Floating-point
Study in Text Book by yourself.

51. Next on Lecture 4