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Update on “Muonic Timing” of CSC Electronics
1/11/2018 Update on “Muonic Timing” of CSC Electronics 2014 January: Updated from 01-Sep-2009 talk Hauser talk at CSC Commissioning and DPG meeting Main Twiki for CSC synchronization: Online CSC timing-in history: ~2007 Lev Uvarov invented muonic timing for CSCTF but we were too dense to appreciate its use for TMBs and ALCTs right away Implemented by the UCLA engineer ~2009 anodes (2010 cathodes?) Greg Rakness did the online timing-in during (cosmicsbeam splashcollisions), documented procedures at Twiki Gian Piero did the bulk of the synch work on the CSCTF side Offline CSC timing-in history: Amanda Deisher cathodes ~ , Chris Farrell anodes & combined ~2011 Now: UCLA-TAMU-Helsinki team is looking into the ME1/1 firmware issues (OTMB, possibly DCFEB) Pieter Everaerts will concentrate on timing-in for Run 2 Starting with ME4/2… because ME1/1 needs firmware updates 1/11/2018 Endcap Muon Meeting Hauser
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ALCT “muonic” timing Recall:
1/11/2018 ALCT “muonic” timing Recall: Anodes give the fine timing on CSC chambers in trigger, and offline TMB controls the ALCT clocking Set a fine delay on this clock so that collision muons go through chambers at the same ALCT clock phase (TOF adjustment) The phase used is the one that maximizes the ALCT occupancy in a single bx (~98%) 2ns setting accuracy (DDD delay chips) ALCT trigger is delayed at TMB input n BX So the muon trigger ALCTs arrive at TMBs at the same time (same clock cycle) Then matched LCTs to MPC are sent at the same time from every chamber 1/11/2018 Endcap Muon Meeting Hauser
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Clocks running downwards
ALSO: combine muonic timing with perfect bx synchronization via BC0 (Lev Uvarov idea) 1/11/2018 Pass BC0 through the electronics chain and check alignment at each stage every orbit: Clocks running downwards TTC bc0 bc0 CCB1 CCB2 Globally isochronous after TTC fine delay corr’s TMB TMB TMB TMB Anode data input ALCT ALCT ALCT ALCT Cathode data input TMB TMB TMB TMB Isochronous bunch Crossings within a crate MPC1 MPC2 Pcrate 1/60 Pcrate 2/60 Isochronous bunch crossings after SP input FIFO delays CCB SP 1/11/2018 Endcap Muon Meeting Hauser
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Some details Without muonic timing, two ALCT clock phases are used:
1/11/2018 Some details Without muonic timing, two ALCT clock phases are used: ALCT clock phase delays: alct_tx_delay and alct_rx_delay are “timed in” so that both ways of data transmission TMB ↔ ALCT work reliably Timing depends on Skewclear cable delay TMB→ALCT 40 MHz clock arrives at ALCT “when it arrives” With muonic timing, three ALCT clock phases are used: TOF phase is pre-calculated from TOF + Skewclear cable delays (NB were determined for collision muons; for expediency use the same values for cosmic rays thereafter) As before, tx and rx clock phases scanned in 2D and then set to make sure TMB ↔ ALCT data transmission is okay in both directions 1/11/2018 Endcap Muon Meeting Hauser
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Details: TMB-ALCT clocking diagram
1/11/2018 Details: TMB-ALCT clocking diagram With muonic timing: Adds alct_tof_delay setting 1/11/2018 Endcap Muon Meeting Hauser
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Muonic Timing Diagram (next slide)
1/11/2018 Compares 2 CSC chambers with different Skewclear delays and TOFs Horizontal direction: different chambers Vertical axis: time (increases downward) 1/11/2018 Endcap Muon Meeting Hauser
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2 CSCs, diagram of timing with physical connections:
1/11/2018 2 CSCs, diagram of timing with physical connections: Master clock TMB #1 TMB #2 Here, clocks are synchronized ALCT TOF delay ALCT TOF delay ← Time ALCT2 Here, clocks are adjusted so that leading edges are in time with the arriving muons ALCT1 sync sync Here, clocks are adjusted so that BC0’s and muon data are all re-synchronized TMB #1 TMB #2
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← Time (bx) Detailed muonic time diagram Key: CSC #1 CSC #2
1/11/2018 TX BC0 delay (integer) Skewclear (physical) cable delay to ALCT tx TOF delay (remainder) RX input data delay (integer) rx TMB-in phase Key: cable delay from ALCT = to ALCT At ALCT TMB BC0 to ALCT TMB clocks Collision At BX0 Hypothetical muon from BX0 ALCT clocks ← Time (bx) TMB BC0 return - Aligned! CSC #1 CSC #2
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Calculation of Muonic Timing delays: Step 1
1/11/2018 Calculation of Muonic Timing delays: Step 1 Goal: assure isochronous return of BC0 Have a reference chamber: originally ME-1/2/28 at bottom, changed to ME-1/2/1 on horizontal on 11-Nov-2009 (same Skewclear cable lengths ) For ME+4/2, can use previous 5 chambers as references Why: then we have a synchronized system of electronics, although TOF not taken into account How: Precalculate the Skewclear cable delays based on a table of cable lengths and propagation speeds NB some cables had different dielectrics and therefore propagation speeds Leave TX delays alone (guesstimate, probably pretty good in 2014) Set tx and rx delays as they are from initial establishment of reliable communication Just adjust RX so that the BC0 signal returns to the TMB (and MPC and SP) at exactly the same time, always NB TOF delay isn’t involved in this step 1/11/2018 Endcap Muon Meeting Hauser
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Calculation of Muonic Timing delays: Step 2
1/11/2018 Calculation of Muonic Timing delays: Step 2 Goal: assure ALCT clocking at same time (within 2 ns) for muon from collision point Why: ALCT will tag muon with the correct bunch crossing and all TMBs will receive the data for any muon at the same time (synchronously) Time of flight is to middle of CSC chamber. Relative to the reference chamber How: Precalculate the time-of-flight value tn for every chamber based on distance from the middle of the CSC chamber to the collision point Adjust TXn+ txn according to the time-of-flight equation: Sn + TXn+ txn - tn = S0 + TX0+ tx0 – t0 (reference chamber) Must then correct RX + rx in the opposite direction to restore synchronous return of BC0 established in Step 1. First correct RX Remeasure tx-rx for good communication with ALCT *** Sounds a little funny since rx should be precisely determined, but depends on details of electronics – new diagram needed *** Should verify that BC0 returns synchronously When we get collisions, iterate on the time-of-flight settings (txn ) 1/11/2018 Endcap Muon Meeting Hauser
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From 3-Nov-2009: Comparisons of TOFs
1/11/2018 From 3-Nov-2009: Comparisons of TOFs Collision muons, Beam 1 halo, Beam 2 halo, Cosmic rays Minus endcap Upstream timing is 2-3 bx off ME1/2 ME2/1 ME3/1 ME4/1 ME1/1 ME1/3 ME2/2 ME3/2 ME4/2 1/11/2018 UCLA Meeting Hauser
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Conclusions / next steps
1/11/2018 Conclusions / next steps Without a close look at the timing, thus far at Point 5 we have done checkout, not commissioning on ME+4/2, ME+1/1 Suggested steps for firmware designers: Update figure for ALCT clocking according to muonic timing firmware Find out exactly what ALCT clocking capability is removed in current OTMB firmware, then work to try to re-establish the capability Suggested steps at CERN When HV fully installed, LV situation is stable (~March), work on ME+4/2 muonic timing Verify BC0 alignment, re-examine ballpark constants, re-run the muonic timing-in procedure, look at cosmic ray data not triggered by ME4/2 and study ME4/2-ME3/2 trigger and offline timing alignment Follow OTMB firmware updates and test out with ME+1/1 as they arrive Extend the muonic timing capability of OTMB to cathodes Comparator data: have integer BX delays already. For fine delay, this involves software for the DCFEB configuration Nice talk by Greg: 1/11/2018 Endcap Muon Meeting Hauser
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Backup or old (possibly outdated) slides
1/11/2018 Backup or old (possibly outdated) slides 1/11/2018 Endcap Muon Meeting Hauser
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Additional details: posneg parameter
1/11/2018 Additional details: posneg parameter Because TMB↔ALCT is 80 MHz multiplexed 1/11/2018 Endcap Muon Meeting Hauser
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May 2009 Simplified Test: Bypass ALCT
1/11/2018 May 2009 Simplified Test: Bypass ALCT Expect BC0 already isochronous at TMB due to TTC fine delay corrections made Oct. 2008, so bypass hardest part (ALCT) TTC Clocks running downwards bc0 bc0 CCB1 CCB2 Globally isochronous after TTC fine delay corr’s TMB TMB TMB TMB ALCT ALCT ALCT ALCT BYPASSED TMB TMB TMB TMB MPC1 MPC2 J. Hauser (UCLA) Pcrate 1/60 Pcrate 2/60 Isochronous muons after SP input FIFO delay CCB SP 1/11/2018 Endcap Muon Meeting Hauser
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May ’09 Test Result: Verified:
1/11/2018 May ’09 Test Result: Verified: All BC0’s are seen at the same time at the SP Now configured so TMB sends bx numbers to trigger CSC BC0 signals are now all aligned at Global Trigger (1st subsystem to accomplish this) Just a minor accomplishment (really want this from ALCT) So need to extend BC0 synchronization all the way to ALCT through cables of various lengths… Newer (post-CRAFT 2009) TMB firmware versions allow for all of this January 2014 situation: for OTMB and ME1/1, firmware needs to re-incorporate muonic timing capability… probably need to check BC0 alignment of ME1/1 versus other types of chambers 1/11/2018 Endcap Muon Meeting Hauser
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What about CFEB synchronization?
1/11/2018 What about CFEB synchronization? Would be attractive to clock comparators with “muonic timing” Could optimize and have same CLCT-ALCT time matching on every chamber Not as critical for trigger timing Requires 5 more “global” clock adjustments per TMB All because of ~7 chambers that have CFEBs with different Skewclear propagation delays due to cable mismatch It has taken ~3 months to achieve that in firmware (TMB’s FPGAs are essentially 110% full) Muonic timing-in procedure will/would be similar but simpler than for ALCT because of 1-way communication …this description not yet available… 1/11/2018 Endcap Muon Meeting Hauser
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Time (bx) Older detailed muonic time diagram Collision At BC0 CSC #1
1/11/2018 TMB BC0 out to ALCT TX1 bc0 delay TMB clocks tx1 TOF delay TX2 bc0 delay tx2 TOF delay S1 Skewclear delay S2 Skewclear delay Collision At BC0 Time (bx) S2 Skewclear delay Hypothetical muon from BC0 rx2 TMB-in phase ALCT clocks S1 Skewclear delay RX2 input data delay rx1 TMB-in phase RX1 input data delay TMB BC0 return - Aligned! CSC #1 CSC #2
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Details: TMB-ALCT clocking diagram
1/11/2018 Details: TMB-ALCT clocking diagram Crate Master clock Old, i.e. w/o muonic timing: The ALCT-TX clock phase is chosen only for best data transmission to TMB TMB TMB Master clock ALCT section Latch input ALCT data Latch output ALCT commands ALCT -RX clock 2ns/bin Adjust ALCTtx for optimal latching of ALCT output data at TMB CCB test pulse commands Adjust ALCTrx for optimal latching TMB output data at ALCT ALCT -TX clock TMB pass- through 2ns/bin ALCT commands ALCT data ALCT ALCT Master clock ALCT Main FPGA Internal test pulse via VME command to TMB Adjust Delay ASICs for max. probability for ALCTs to come in one BX Asynch. test pulse from VME write to CCB Delay ASICs ALCT latch raw data Synch. test pulse from TTC command or VME write to CCB Main FPGA OR ~2.2ns/bin AFEB CSC Test Pulse Strips Test pulse to AFEB amplifier or test strips (select via VME write to TMB to ALCT Slow Control FPGA register) AFEB data 1/11/2018 Endcap Muon Meeting Hauser
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Calculation of Muonic Timing delays
1/11/2018 Calculation of Muonic Timing delays Time of flight is to middle of CSC chamber. Timing notation: tn = TOF for each chamber, pre-calculated based on the distance from the collision point (or from the reference chamber in the case of cosmic rays). Sn = Skewclear cable delay time for each chamber. This is pre-calculated based on the known cable lengths for every chamber. TXn+ txn = Integer+phase delay for TMBALCT commands for each chamber RXn+ rxn = Integer+phase delay for ALCTTMB data for each chamber Isochronous return of bc0: TXn+ txn + 2*Sn + RXn+ rxn = TX0+ tx0 + 2*S0 + RX0+ rx0 (reference chamber) Note that tn (TOF) is not involved in this equation. Step 1 involves adjusting only RXn+ rxn to make the left-hand side equal to the (fixed) right-hand side Muonic clocking: Sn + TXn+ txn - tn = S0 + TX0+ tx0 – t0 (reference chamber) Note that Step 2 involves adjusting TXn+ txn to make the left-hand side equal to the (fixed) right-hand side, and then correcting RXn + rxn in the opposite direction to keep the previous equality for isochronous return of BC0. (We believe, subject to confirmation, that we only need to correct the integer portion RXn) 1/11/2018 Endcap Muon Meeting Hauser
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1/11/2018 Timing-in Procedure Step 1 of 2: align all of the BC0's returning from ALCT to TMB The rest of this page is for “experts” only Remarks: Actual TOF corrections come in Step 2, so leave TOF delay values at default or unaltered for now Take as prerequisite that all of the clct_bx0's are already aligned (verified in June ‘09 by reading CSC-TF with MPCs in transparent mode) Detailed Steps: Set all TMBs clct_bx0_delay[3:0] (a.k.a. VME AdrCA[07:04]) to 15 (max) For ALL chambers, do the phase adjustment procedure seen on next slide to establish good TMB-ALCT communications in both directions (Does not alter txn and determines rxn) For the reference TMB, scan over TXn values (a.k.a. VME Adr38[15:12] “alct_txd_int_delay[3:0]”) values until we get “bx0_match” (VME AdrCA[10]) latched on every orbit (e.g. check 100 times) (We vary the TMBALCT delay only for this chamber so that we are not delaying ALCT output data any more than at present) For other chambers, set the value of TXn to be the same as the reference chamber For other chambers, scan over RXn (a.k.a. VME AdrB2[3:0] “alct_delay[3:0]”) values until you get “bx0_match” on every orbit The ALCTs should be arriving at all of the TMBs at the same time now. We then have to delay CLCTs to be correctly in time. HOW TO DO THIS? LOOKS LIKE CFEB TOF SUB-BX DELAY IMPLEMENTED, HOW ABOUT INTEGER BX FOR CFEB DATA? If RXn changes, the time at which data is sent from TMBMPCSP changes. So to keep that time the same, change mpc_tx_delay opposite to the change in RXn. 1/11/2018 Endcap Muon Meeting Hauser
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ALCT and CFEB timing adjustments
1/11/2018 Version 08/14/09 Digital Phase shifters for CFEBs Has both ALCT and CFEB muonic timing. Disabled cfeb posnegs and alct_rxd_posneg else compile fails. Alct_txd_posneg is OK. Notes on ALCT and CFEB timing adjustments: ALCT: 1) Select a Time of Flight delay: Using DDD 2ns steps, ranging from 0 to 12, spanning 0 to 24ns Based on distance from IP to “some point” on the CSC Also compensate for tmb-to-alct cable propagation delay differences between CSCs Write alct_tof_delay to DDD chip in Adr16[3:0] 2) Tune alct_rxd_delay to the good-data window center Using Digital Phase Shifter 0.1ns steps, ranging from 0 to 255, spanning 0 to 25ns Put ALCT into loopback mode to send a test pattern to TMB Scan alct_rxd_delay using Phaser0 Adr10E[15:8] Scan alct_rxd_posneg 0-1 using Phaser0 Adr10E[15:8] (disabled in 8/14/09 firmware) 3) Tune alct_txd_delay to the good-data window center Scan alct_txd_delay using Phaser1 Adr110[15:8] Scan alct_rxd_posneg 0-1 using Phaser1 Adr110[15:8] (not disabled in 8/14/09 firmware) CFEBs: Also compensate for tmb-to-cfeb cable propagation delay differences between CSCs Write cfeb_tof_delay to DDD chip in Adr18[11:8] 2) Tune cfeb[n] clock delays for simultaneous arrival at all 5 cfebs Delays might be set according to known cable propagation delays Delays might be determined empirically by setting high comparator thresholds to make the analog signal time-over-threshold less than 25ns, then scanning DDD delay vs 6-hit efficiency. Write cfeb[n] clock delays to DDD channels in Adr18[15:12] and Adr1A[15:0] 3) Tune cfeb_rxd_delay for cfeb[n] to the good-data window center Generate CFEB test pulses or use muon tracks Scan cfeb_rxd_delay using Phaser2-6 Adr112-Adr11A bits[15:8] Scan cfeb_rxd_posneg 0-1 using Phaser2-6 Adr112-Adr11A (disabled in 8/14/09 firmware) 4) Tune cfeb inter-stage integer delay for cfeb[n] Set a delay 0-15bx so that triad bits from all 5 CFEBs arrive at TMB on the same bxn Might be done by pulsing all 5 CFEBs simultaneously, then checking the CFEB raw hits readout to see that triad start bits all appear in the same bxn. Set cfeb[n] inter-stage delays in Adr11C-Adr11E TMB specification document v4.40, page 123: ALCT and CFEB timing adjustments The rest of this page is for “experts” only Note for Greg: on this page alct_rxd_delay phase_alct_rxd and alct_txd_delay phase_alct_txd
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Timing-in Procedure Step 2 of 2: implementation of real TOF delays
1/11/2018 Timing-in Procedure Step 2 of 2: implementation of real TOF delays The rest of this page is for “experts” only Remarks: TOF correction values are pre-calculated from TOF as well as Skewclear cable propagation delays based on cable lengths TOF values in this diagram are a combination of: the sub-bx (ns level) txn (a.k.a. ALCT TOF delay or alct_tof_delay), and an integer bx delay TXn (a.k.a. alct_txd_delay[3:0]”) These delays apply to all commands from TMB to ALCT Must modify this phase and integer constant without disturbing the bc0 alignment previously achieved Detailed Steps: (It seems to be unknown whether if txn (alct_tof_delay) only is changed, whether the timing-in procedure for phase_alct_txd and phase_alct_rxd will change the return time of BC0. Hopefully it does not. IFF it does change the BC0 return time, then we also have to precalculate the timing changes from that source.) For every TMB, modify RXn (“alct_delay”) in the opposite direction by the same amount as TXn (“alct_txd_delay[3:0]”) is altered (integer values). If there is any chamber with RXn less than zero, then add a constant to make all RXn zero or positive. If all chambers have RXn larger than zero, can subtract the minimum value from all chambers to achieve minimum trigger latency. 1/11/2018 Endcap Muon Meeting Hauser
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