1. Accelerate HD video processing through affordable hardware
by Digilent - a National Instruments Company
Main points:
Streaming HD video from CSI-2 camera over HDMI
Video pipeline designed in Vivado, with real-time processing defined in VivadoHLS

2. Streaming video with Sobel filter applied

3. Real-time edge detection
Hardware: Zybo, FullHD Video Source, Display
IPs: DVI Source, Sink Interconnect
Sobel filter in HLS

4. Hardware
Zybo
HDMI Sink, VGA Output

5. Zynq IP DVI Sink Video-to-AXIS Filter (HLS) AXIS-to-Video DVI Source
Software
CPU
BSD-licensed IP available at github.com/Digilent/vivado-library

6. Offload software tasks to hardware
Why HLS?
Code hardware faster
Offload software tasks to hardware
Selective optimization

7. Vivado High Level Synthesis
C/C++ algorithm
Unit test
Synthesis
Analysis
RTL Simulation
Export IP

8. Tasks Understand system requirements Write filter function
Write C test-bench
C simulation
Synthesis
Scheduling
Binding
Control logic
Analysis
RTL co-simulation
Package filter IP
Insert HLS IP into Vivado project