1. Input/Output Device Drivers

2. Task Accept commands from higher-level processes of i/o system
Interact with devices it controls to carry out the commands

3. By Device Type
Block-Oriented: read or write a block of data specified by its block number
Stream-Oriented: get or put next character in stream
Communications: send/receive a data packet to/from another machine specified by its network address

4. Down, Down
Driver translates commands to low-level operations issued by device controller
Communication between driver and controller done by reading/writing controller registers
Registers constitute the software/hardware interface

5. Device Controller Interface
Controller detects new opcode
Sets busy register
Status register reports outcome of request
Driver may access data buffer

6. Memory-Mapped Interfaces key Idea: special instructions not needed for i/o requests
Sample Instruction to store contents of a register to a memory location
>store cpu_reg, k
0 <= k <= n-1 where n-1is last address in RAM
Two Ways to Handle I/O Requests
Provide special i/o instructions
>io_store cpu_reg, dev_no, dev_reg
dev_no names device
dev_reg names register within device
b) Map device into memory, where all addresses n or above belong to devices
>store cpu_reg, n
stores the contents of cpu_reg to register 0 of controller 0
Provides a uniform view of memory
Simplifies i/o programming
mmap() in linux
Non-Memory-Mapped
Memory-Mapped

7. Two Final Issues How to detect the completion of controller operation?
What should move the data between the controller buffer and main memory

8. 1a) Detecting Completion Polling Scheme
CPU writes operands for i/o op
cpu writes opcode. Causes execution and sets busy flag
Controller interacts with device
CPU polls the busy flag
CPU reads status register to detect problems
CPU copies contents of buffer to RAM

9. Polling Pseudo-Code Input:
i = 0 do { write_reg(opcode,read); while(busy); ram_in[i] = data_buffer; ++i; compute; } while (data_available)
Output is similar
Key Point: CPU has two tasks that can be handed-off
Checks for i/o completion
Moves data between RAM and controller registers

10. 1b) Detecting Completion Interrupt Scheme
CPU writes operands
CPU writes opcode. Controller starts operation. Sets busy flag. Process blocks itself, giving up CPU.
Controller interacts with device.
Operation is complete. Controller issues an interrupt, suspending currently running process and resuming process waiting for i/o.
Resumed process examines status register.
Process copies buffer to main memory.

11. Interrupt Pseudo-code
Input:
i = 0 do { write_reg(opcode,read); block to wait for interrupt; ram_in[i] = data_buffer; ++i; compute; } while (data_available)
Solves problem 1: No more busy-waiting
But quite expensive: thousands of CPU instructions
See Bic & Shaw, p. 383 for details

12. 2) Moving data from controller buffer to Main Memory
Look Again at Step 6 in Slide 10
CPU moves data from controller buffer to main memory
Could this be done more efficiently?

13. Direct memory access (dma)
CPU writes operands including starting location in MM for transfer and number of bytes to be transferred
CPU stores opcode in controller register. Initiates controller which sets busy flag. Process blocks itself.
Controller interacts with device.
Controller copies data from buffer to MM (repeatedly as necessary)
Controller unsets busy flag and issues CPU interrupt.
CPU tests status registers