1. Government Engineering College,
Transistor
Prepared by:-
Subject:- Analog Electronics( )
Department :- Electrical Engineering
Faculty Name:- N. A. Mistri
S Swami
Government Engineering College,
Palanpur

2. Classification of FET
According to the type of the channel, FETs can be classified as
MOSFET
N channel
P channel
JFET
Enhancement type
Depletion type
Enhancement type
Depletion type

3. The depletion-type MOSFET
Physical structure
The structure of depletion-type MOSFET is similar to that of enhancement-type MOSFET with one important difference: the depletion- type MOSFET has a physically implanted channel
There is no need to induce a channel
The depletion MOSFET can be operated at both enhancement mode and depletion mode

4. Device structure of MOSFET (n-type)
Gate(G)
Source(S)
Oxide
(SiO2)
Drain(D)
Metal n+
p-type Semiconductor
Substrate (Body)
Channel area
Body(B)
For normal operation, it is needed to create a conducting channel between Source and Drain

5. Device structure of MOSFET (n-type)
L = 0.1 to 3 mm
W = 0.2 to 100 mm
Tox= 2 to 50 nm
Cross-section view

6. Drain current under small voltage vDS
An NMOS transistor with vGS > Vt and with a small vDS applied.
The channel depth is uniform and the device acts as a resistance.
The channel conductance is proportional to effective voltage, or excess gate voltage, (vGS – Vt) .
Drain current is proportional to (vGS – Vt) and vDS.

7. Drain current under small voltage vDS

8. Operation as vDS is increased
The induced channel acquires a tapered shape.
Channel resistance increases as vDS is increased.
Drain current is controlled by both of the two voltages. B

9. Complementary MOS or CMOS
The PMOS transistor is formed in n well.
Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well.
CMOS is the most widely used of all the analog and digital IC circuits.

10. Circuit symbol
Circuit symbol for the n-channel enhancement-type MOSFET.
Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel).
(c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.

11. Figure: n-Channel JFET and Biasing Circuit.
Biasing the JFET
Figure: n-Channel JFET and Biasing Circuit.

12. JFET (n-channel) Biasing Circuits
For Fixed Bias Circuit
Applying KVL to gate circuit we get
and
Where, Vp=VGS-off & IDSS is Short ckt. IDS
For Self Bias Circuit

13. The junction FET D G D N-channel G S S Depletion layer P+
n-type Semiconductor S

14. Physical operation under vDS=0G D S G P+ P+ P+ G S
UGS = 0
UGS < 0
UGS = UGS(off)

15. The common-source amplifier
The simplest common-source amplifier biased with constant-current source.
CC1 And CC2 are coupling capacitors.
CS is the bypass capacitor.

16. Equivalent circuit of the CS amplifier

17. Equivalent circuit of the CS amplifier
Small-signal analysis performed directly on the amplifier circuit with the MOSFET model implicitly utilized.

18. Characteristics of CS amplifier
Input resistance
Voltage gain
Overall voltage gain
Output resistance
Summary of CS amplifier
Very high input resistance
Moderately high voltage gain
Relatively high output resistance

19. The CS amplifier with a source resistance

20. Small-signal equivalent circuit with ro neglected
Voltage gain
Overall voltage gain
RS takes the effect of negative feedback
Gain is reduction by (1+gmRS)

21. The common-drain or source-follower amplifier
Biasing with current source
Input signal is applied to gate, output signal is taken at the source

22. The CD or source-follower amplifier
Small-signal equivalent-circuit model
T model makes analysis simpler
Drain is signal grounded
Overall voltage gain

23. Loop Gain or Return Ratio:
The signal ˆXi in Fig. 9-4 is multiplied by gain A when passing through the amplifier and by in transmission through the feedback network. Such a path takes us from the amplifier input around the loop consisting of the amplifier and the feedback network. The product, A, is called the loop gain or return ratio T.
Equation (9-4) can be written in terms of AOL and T as:
For negative feedback, –A β= T > 0,We can give a physical interpretation for the return ratio by considering the input signal Xs = 0, and keeping
the path between Xi and Xˆi open. If a signal Xˆi is now applied to the amplifier input, then Xi =Xf = Aβ.
The return ratio is then the negative of the ratio of the feedback signal to the amplifier input. Often the quantity F= 1+Aβ= 1+T is referred to as the return difference. If negative feedback is considered then both F and T are greater than zero.

24. The Series-Shunt Feedback Topologies
voltage-mixing voltage-sampling (series–shunt) topology

25. The Series-Series Feedback Topologies
voltage-mixing current-sampling (series–series) topology

26. The Shunt-Shunt Feedback Topologies
current-mixing voltage-sampling (shunt–shunt) topology