1. DAQ read out system
Status Report
Read-out evaluations on hardware node network Hardware point to point (“shore to subsea”) connections
Towards a Modular and Multi-user KM3NeT Node Network
Tests on technologies for this DAQ Read Out system
Newly arrived at Nikhef BER/Network Analyze Instruments up to 12 Gb/s
New Photonic Laboratory at Nikhef

2. Main Similarities and Differences
Status Report
10Gb/s upstream
156 Mb/s downstream
Distributed Asynchronous read-out
Distributed time stamp off shore
Ethernet controlled read-out
Dedicated Synchronous read out
Distributed clocks on shore
Detector wide “heartbeat” read-out

3. Exploring a modular Multi user KM3NeT Node Network
Status Report
A synchronous node design
From shore to each Node e.g. a Story
Synchronous data transport using a single sourced read-out system clock The “Heartbeat”
Optical Channel connections
The System Clock distribution is proved
Event time-stamp to the PMT data on shore
On Shore Slow Controls/ Timing and/or Trigger controls

4. Architecture for Km3NeT Avoiding Rayleigh Limitation
Comms & Timing
cw DWDM lasers
(up to 100 wavelengths)
PMTs
DWDM Mux
DWDM
Demux
Optical receiver
Electrical drive
to modulator.
(single modulator gates all DWDM Wavelengths)
WDM Demux
Data Receiver
100km fibre path
Data out
Shore Station
Undersea Station
Architecture for Km3NeT Avoiding Rayleigh Limitation
Optical Amplifiers
Up to 100 reflective
modulators
Power splitters to feed up to 100 units
1 of 100
fibres
Single fibre feed shared
for feed wavelength comb l1
2km
OMs

5. Test bench SPARK Xilinx5 FPGA kit Lattice FPGA App. sub-sea shore
Sophisticated Photonic Architecture a Readout for Km3Net
AWG
clk
driver cw
ch 17 17 18 19
data 17 18 19
R-EAM
clk
combiner
DWDM
to sub-sea
from shore
driver
DWDM
R-EAM
data cw
ch 18
R-EAM
clk
R-EAM
driver
data cw
tun
SOA
Xilinx5
FPGA kit
Lattice
FPGA
App.
clk
data
receiver
PIN
sub-clk
clk
data
receiver
PIN
sub-clk
DWDM
from sub-sea
to shore
shore
sub-sea
100 km fiber

6. Received signal after a 10 km connection at receiver output
10 Gb/s Eye Pattern
Received signal after a 10 km connection at receiver output
BER =
Signal Quality
72.4 mV/div Clock Rec: 10,3125 Gb/s Time 16.2 ps/div Trig: Pattern
5.1 mV LBW 4.13 MHz Delay ns Bit 113

7. Signal Propagation Test Setup for KM3NeT DAQ

8. Pulse Transmission over 10 km
jitter mainly from P-N change over in the electronic circuitry
48.80 ps

9. Modular and multi-user KM3NeT Node Network
Synchronous Read-Out
WP 2, 3, 4, 5 Meeting, February 2009 Paris, Jelle Hogenbirk et al.
Transparent network for the DAQ system
Uses minimum of hardware/functions on the seabed

10. Node Function description
Analogous to GBT (Gigabit Transceiver) architecture for LHC
Three concurrent functionalities are defined: .
DAQ data acquisition,
Or synchronous, real-time else asynchronous, store and forward data transport
TTC timing and trigger control
e.g. time controlled triggers for led flashes for calibration purposes.
SC slow control
switching, system checks, value settings etc.

11. A vehicle for developments for a minimum of hardware on the seabed
Node Development Kit
A vehicle for developments for a minimum of hardware on the seabed
Onshore:
FPGA :
Signal propagation time measurements
The Interface from GbE to SPARK
on-shore or off-shore event time stamp requirements
Slow Control /Timing and Triggering Control requirements
SERDES 10 GB/s deserializer
Some additional photonics among an laser for Bidirectional data
Offshore:
FPGA :
DAQ continuous read out
Timing and Triggering Control requirements
Slow Control /
SERDES 10 Gb/s data serializer

12. First write-ups for a Node Development Kit
an addition to Spark
10Gb/s upstream
156 Mb/s downstream
67 bit words are serialized
Using the “Interlaken” Protocol
Shore logic
CWLASER
GbE
Ethernet
LASER
FPGA
10 Gb/s deserializer
PIN
GPS timing signal
156 Mhz CLK
Sphere logic
CPLD
156Mb/s
PIN
decoder
FPGA
CLK_QPLL
Heart Beat
sys clk
8bit/30 MHz
REAM
IC-board
10 Gb/s serializer
4x Gb/s
PMT signals / 31 bits LVDS

13. Agilent BER analyzer and TDR analyzer for 12 Gb/s

14. Agilent BER analyzer and TDR analyzer for 12 Gb/s
J-BERT N4903A Gb/s
High Performance Serial BERT
Bit Pattern Generator
DCA-J C
Digital Communication Analyzer
with
86108 A 32 GHz BW
Precision Waveform Analyzer or
54754 A 18 GHz
Differential TDR Module
Sample Oscilloscope
and

15. Agilent Lightwave Multimeter 8163 B
with
Optical Reference Receiver A (12 Gb/s)
Agilent 8163 B
Lightwave Multimeter
with
81495A Ref. Receiver

16. New Photonic Laboratory at electronic department