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Simple Parity Check The simplest form of error detection is the parity check used with ASCII codes, originally on asynchronous modem links Each 7 bit ASCII.

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Presentation on theme: "Simple Parity Check The simplest form of error detection is the parity check used with ASCII codes, originally on asynchronous modem links Each 7 bit ASCII."— Presentation transcript:

1 Simple Parity Check The simplest form of error detection is the parity check used with ASCII codes, originally on asynchronous modem links Each 7 bit ASCII character is followed by a single parity bit This bit is set in such a way that the total of all the bits including the parity bit is even (even parity) or odd (odd parity) The parity bit can also be always set to 1 (mark parity) or 0 (space parity) which disables parity checking Parity is often configured to be even for synchronous transmission and odd for asynchronous transmission 7/12/10 09-Errors

2 Simple Parity Check - Performance
It will only detect 50% of errors If the are two errors (or any even number of errors) in the character, no error will be detected Noise impulses often last for longer than one bit and come in bursts that may effect 10 or more bits. Single bit errors are actually quite rare 7/12/10 09-Errors

3 Truth Table for Exclusive OR (XOR)
A XOR B means A OR B, but not A AND B The Truth Table for OR () and XOR () is: A B A  B A  B 1 7/12/10 09-Errors

4 Simple Parity Check - Implementation
Parity bits can be generated easily using logic hardware using eXclusive OR (XOR) gates XOR(b7,XOR(b6,XOR(b5,XOR(b4,XOR(b3,XOR(b1,b2)))))) Start by XOR-ing bit1 and bit2, then XOR the result with bit etc. until bit 7 is XOR-ed with the result of XOR-ing bits 1 to 6 The result is the even parity bit To perform a parity check using XORs follow the same process up to bit 8 XOR(b8,(b7,XOR(b6,XOR(b5,XOR(b4,XOR(b3,XOR(b1,b2))))))) If the result is 0 the check is successful If the result is 1 the check is unsuccessful 7/12/10 09-Errors

5 Generation of Parity Bits
Generate the parity bit for b7 b6 b5 b4 b3 b2 b1 1 Even parity bit = 1 7/12/10 09-Errors

6 Implementation of Parity Checks
Check the character b8 b7 b6 b5 b4 b3 b2 b1 1 Passes even parity check 7/12/10 09-Errors

7 Implementation of Parity Checks
Check the character b8 b7 b6 b5 b4 b3 b2 b1 1 Fails even parity check 7/12/10 09-Errors

8 Block Check Characters
Simple Parity Checks are often called a Vertical Redundancy Check (VRC) Redundancy refers to the fact that extra information (the redundant parity bit) is transmitted along with the data Vertical refers to data transmitted as a block of characters. Each character can be most easily represented by a column of bits and the checking is done vertically Blocks can also be parity checked horizontally with the a redundant character called the Block Check Character (BCC) being appended to the Block as a Longitudinal Redundancy Check (LRC) in addition to the VRC. This is used in IBM’s BSC (Binary Synchronous Communication) Data Link Protocol 7/12/10 09-Errors

9 Block Check Characters
Direction of Transmission of Bytes (LRC last) Direction of Transmission of Bits (VRC last) Check all the VRC and LRC parity bits 7/12/10 09-Errors

10 Block Check Characters
Direction of Transmission of Bytes (LRC last) Direction of Transmission of Bits (VRC last) 7/12/10 09-Errors

11 Block Check Characters
Exercise: Find the single bit error Direction of Transmission of Bytes (LRC last) Direction of Transmission of Bits (VRC last) 7/12/10 09-Errors

12 Block Check Characters
Solution Direction of Transmission of Bytes (LRC last) Direction of Transmission of Bits (VRC last) 7/12/10 09-Errors

13 Block Check Characters - Performance
The LRC increases the probability of detecting burst errors Because all the bits of a single character are transmitted sequentially any burst error of up to 8 bits will cause a single bit errors in the LRC which will be detected Burst errors of longer than 8 bits have a high probability of detection If two bits of one character are corrupted and the same two bits of one other character are damaged the error will not be detected 7/12/10 09-Errors

14 Internet Checksum UDP, TCP and other Internet-based protocols use a simple error detection technique defined in RFC 107 At the sender Add together all the 16 bit words, padding data with 0s if necessary to make an integral number of words Take the 1’s complement Append this as the checksum At the Receiver Add together all the 16 bit words including the checksum If the result contains any 0 bit, then an error has occurred 7/12/10 09-Errors

15 Internet Checksum Example
Receiver Checksum OK Sender Checksum = 7/12/10 09-Errors

16 Internet Checksum Example
One further enhancement to the Internet Checksum is that when data is summed and the total overflows, the carry bit is added back in at bit 1. This ensures that errors in bit 16 are more likely to be detected. Sender 1 Checksum = Receiver 1 Checksum OK 7/12/10 09-Errors

17 Internet Checksum - Performance
Detects all errors involving an odd number of bits as well as most errors involving an even number of bits It will not detect an error where a pattern of bits in one word are inverted and a similar pattern in another word of opposite values are inverted 7/12/10 09-Errors

18 Cyclical Redundancy Checks
CRC is an error detection technique which treats the data to be protected as a long binary number and divides this by a specific number to calculate the remainder which is used as the checksum CRCs can add 8, 16, 24 or 32 bits to the data in the CRC field. CRC-16 and CRC-32 are the most popular It is an extremely powerful technique used by Ethernet and the HDLC Data Link Protocol 7/12/10 09-Errors

19 Modulo 2 Arithmetic CRC error detection uses Modulo 2 arithmetic
Modulo 2 arithmetic is normal binary arithmetic where plus (+) and minus (-) are replaced by XOR() The Truth Table for XOR is: XOR 1 7/12/10 09-Errors

20 Example of Modulo 2 Multiplication
Modulo 2 Multiplication is normal binary multiplication where (+) is replaced by XOR() and there are no carries:  1 1 7/12/10 09-Errors

21 Modulo 2 Division Modulo 2 Division is normal binary division where (-) is replaced by XOR() and there are no carries After each  operation, the most significant 0 bit is dropped and if the next bit is a 0, a 0 is entered into the quotient on the top line and 0 times the divisor is XORed Otherwise a 1 is entered in the quotient and the 1 times the divisor is XORed 7/12/10 09-Errors

22 Example of Modulo 2 Division
1 ) 7/12/10 09-Errors

23 Cyclical Redundancy Checks
The CRC is generated treating the data block as a binary integer and dividing it by a generator usually represented as a polynomial (E.g = x3 + x + 1) such that: It is not divisible by x (i.e. it ends in a 1) It should be divisible by x + 1 (modulo 2) The remainder after dividing the block (appended with zeros) by the generator (modulo 2) is then appended to the block replacing the zeros with the remainder. The number of zeros and the size of the checksum field is one less than the number of bits in the generator 7/12/10 09-Errors

24 CRC on 01011 using 1001 as generator
1 ) 7/12/10 09-Errors

25 CRC on 01011 using 1001 as generator
The CRC field generated is the remainder of the modulo 2 division (i.e. in this case 010) To check the CRC the block appended by the CRC field is divided by the generator If the remainder is zero, the check is OK and there have been no errors If the remainder is not zero the check has failed and there error(s) were received somewhere in the block or the CRC field 7/12/10 09-Errors

26 Checking 01011010 with generator 1001
1 ) 7/12/10 09-Errors

27 Cyclical Redundancy Check - Performance
CRC-16, which uses the polynomial x16 + x12 + x5 + 1, will detect 100% of burst errors of 16 bits or less and % of burst errors longer than 16 bits CRC-32, which uses a complicated polynomial, will detect 100% of burst errors of 32 bits or less and % of burst errors longer than 32 bits 7/12/10 09-Errors

28 Choice of Error Detection Codes
Why do TCP, UDP and IP use the Internet Checksum and Data Link Protocols such as Ethernet and HDLC use CRCs? Transport and Network Layer protocols are implemented in software in hosts and routers and need simple algorithms to avoid wasting processor time Data Link Layer protocols are implemented in hardware where CRC checks can be implemented efficiently Also, more transmission errors occur at the Data Link Layer and so more powerful detection is required. The Transport and Network Layers experience less errors (as most errors are detected and corrected at the Data Link Layer) and therefore only need to protect against errors occurring within network nodes or on data links which do not provide error control 7/12/10 09-Errors


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