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David W. Goodwin, Kent D. Wilken
Optimal and Near-optimal Global Register Allocation Using 0-1 Integer Programming David W. Goodwin, Kent D. Wilken
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Introduction The problem – assign target processor’s limited registers
to unlimited symbolic registers. Graph coloring allocators – use heuristics to reduce spill code overhead. heuristics may fail, causing excessive spill code.
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Optimal Register Allocation (ORA)
uses methods from combinatorial optimization to optimally reduce spill code overhead. formulates register allocation problem as 0-1 integer programming problem. the 0-1 integer program embodies all register allocation decisions that must be made for an optimal allocation
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ORA Allocator overview
consists of three top- level modules : analysis module solver module rewrite module
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ORA Analysis Module analyzes a function to determine the points in the function where decisions must be made about various register allocation actions. each register-allocation decision is a binary decision. Register-allocation decisions include whether a symbolic register should be defined into a specific real register, the assignment of a symbolic register to a specific real register should continue, a symbolic register should be stored to or loaded from memory, etc. analysis module produces a binary decision variable for each register-allocation decision that must be made records the decision variable and the corresponding register allocation action in the decision-variable table for load, store decision variables determines the spill cost overhead. identifies the conditions that a set of decisions must satisfy for a valid register allocation
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ORA Analysis Module uses live range analysis to create a directed
instruction graph for each symbolic register. Instruction Graph – it includes : an instruction vertex for each instruction in symbolic register’s live range. a start vertex for each BB for which the symbolic register is live at the start of the BB an end vertex for each BB for which the symbolic register is live at the end
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Instruction graph edge between
vertices of consecutive instructions in a BB a block’s start vertex to instruction vertex of block’s first instruction block’s instruction vertex of last instruction to end vertex of the block end vertex of block x & start vertex of block y, if symbolic register is live at end of x, is live at start of y & y is a successor of x.
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Instruction graph Example – A = ---- --- = A+1 B = A + 1 -- = B * 2
end1 end2 end3 A = ---- --- = A+1 B = A + 1 -- = B * 2 -- = B / 2 -- = A * 2 1: 2: 3: 4: start2 start3 start4
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Instruction graph A = ---- --- = A+1 B = A + 1 -- = B * 2 -- = B / 2
1: 2: 3: 4: B = A + 1 -- = B * 2 -- = B / 2
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Instruction graph assign one or two labels to each instruction vertex in instruction graph label an instruction vertex – define vertex, if the instruction defines the symbolic register, or use vertex, if the instruction uses the symbolic register, or last-use vertex, if the instruction uses the symbolic register & the symbolic register dies at the instruction inactive vertex, if the instruction does not define, use, or last-use a symbolic register
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Instruction Graph A = ---- define end1 start3 start2 B = A + 1 use
inactive last_use
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ORA Analysis traverse each instruction graph, applying a set of transformations. the transformations produce a symbolic register graph an edge in symbolic register graph represents a point in function where the symbolic register can potentially be allocated to a real register. each edge is labeled with a decision variable which indicates whether the symbolic register is allocated (1) or not (0) to a real register.
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ORA Analysis a symbolic register graph is produced by traversing the corresponding instruction graph, starting from each define vertex. At each instruction vertex, one transformation is applied for each label attached to the vertex.
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Transformations Definition Transformation
applied at instruction graph define vertex a decision variable xdef and a symbolic- register-graph definition edge are produced. definition edge represents the point in function where corresponding instruction defines the symbolic register. definition edge is labeled with xdef xdef indicates whether the symbolic register is allocated (1) or not (0) at the instruction
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Transformations Definition Transformation xdefA xdef
Symbolic Register Graph Instruction Graph s = --- xdefA Symbolic Register Graph for A after Definition Transformation xdef Definition Transformation Figure : Definition transformation and example production of the symbolic register graph for A
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Transformations Block-end Transformation
applied at instruction-graph end vertex a symbolic-register-graph end vertex is produced a symbolic-register-graph arc edge is produced for each edge exiting the instruction-graph end vertex symbolic-register-graph end vertex connects the arc edges to the preceding edge
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Transformations Block-end Transformation xdefA xpre xdefA xdefA xpre
Instruction Graph Symbolic Register Graph xdefA xpre xdefA xdefA end xpre xpre Symbolic Register Graph for A after Block-End Transformation Block-End Transformation Figure : Block-End Transformation and example production of the symbolic register graph for A
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Transformations Block-start Transformation Instruction Graph
Symbolic Register Graph xdefA start xpre1 xdefA xdefA xpre2 xdefA xpre1 xdefA xpre1 = xpre2 Symbolic Register Graph for A after Block-Start Transformation Block-Start Transformation Figure : Block-Start Transformation and example production of the symbolic register graph for A
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Transformations Use Transformation xdefA xdefA xdefA Instruction Graph
Symbolic Register Graph xdefA xdefA xuse-end1A -- = s xpre xuse-end2A xuse-end xuse-cont1A xuse-cont2A xuse-cont xpre = xuse-end + xuse-cont xdefA = xuse-end1A + xuse-cont1A xdefA = xuse-end2A + xuse-cont2A Use Transformation Symbol Register Graph for A after Use Transformation Figure : Use Transformation and example production of the symbolic register graph for A
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Transformations Continuation Transformation xuse-end2A xdefA
xuse-cont2A xuse-cont1A xdefA = xuse-end1A + xuse-cont1A xdefA = xuse-end2A + xuse-cont2A Instruction Graph Symbolic Register Graph xpre xpre Continuation Transformation Symbolic Register Graph for A after Continuation Transformation
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Transformations Last-use Transformation Instruction Graph
Symbolic Register Graph xpre -- = s xpre Last Use Transformation
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Transformations xuse-end2A xdefA xuse-end1A xuse-cont2A xuse-cont1A
B = A + 1 -- = B * 2 -- = B / 2 -- = A * 2 end1 start2 start3 start4 end2 end3 define use inactive last_use
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Transformations xdefB xuse-endB xuse-contB define B = A + 1 use
last_use -- = B / 2 xdefB = xuse-endB + xuse-contB Symbolic Register Graph for B
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ORA Analysis make a copy of each symbolic register graph and set of conditions for each real register. copy of symbolic register graph of s for real register r is designated Grs
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ORA Analysis G1A G2A x1use-end2A x1defA x1use-end1A x1use-cont2A
x1use-cont1A = x1use-cont2A G1A x2defA G2A x2defA x2defA x2defA x2defA x2use-end1A x2use-end2A x2use-cont2A x2use-cont1A x2use-cont2A x2use-cont2A x2use-cont1A x2use-cont2A x2use-cont1A x2use-cont1A x2defA = x2use-end1A + x2use-cont1A x2defA = x2use-end2A + x2use-cont2A x2use-cont1A = x2use-cont2A
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Register Allocation Conditions
to ensure that neither too many nor too few symbolic registers are allocated to real registers. single symbolic requirement : at any point each real register holds at most one symbolic register sufficient to ensure that just after each instruction that defines a symbolic register, each real register holds at most one symbolic register.
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Register Allocation Conditions
to satisfy single-symbolic requirement condition for each real register that restricts the sum of the decision variables representing a symbolic register being allocated to the real register after an instruction that defines a symbolic register to be at most 1.
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Register Allocation Conditions
Conditions enforcing the single-symbolic requirement for symbolic registers A and B x1defA <= 1 x1defB + x1use-cont2A <=1 x2defA <= 1 x2defB + x2use-cont2A <=1
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Register Allocation Conditions
must-allocate requirement each symbolic register definition, use, and last-use must be allocated to a real register x1defA + x2defA = 1 x1use-end1A + x1use-cont1A + x2use-end1A + x2use-cont1A >=1 x1use-end2A + x1use-cont2A + x2use-end2A + x2use-cont2A >=1 x1use-cont1A + x2use-cont1A >=1
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Spill Code Placement if there are too few real registers, the conditions cannot be satisfied! expand the problem formulation to include spill code placement. apply 2 additional transformation to allow optimal spill code placement.
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Spill Code Placement Store Transformation applied at store spill edge
produces a store edge, a continuation edge, and a store vertex store edge is labeled with decision variable xstore and continuation edge with xcont. xstore indicates whether symbolic register is stored to memory or not xcont indicates whether symbolic register is allocated after this point.
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Spill Code Placement Store Transformation xss xstore xss xcont
xcont <= xss Store Transformation
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Spill Code Placement Load Transformation applied at load spill edge
produces a load edge, a continuation edge, and a load vertex store edge is labeled with decision variable xload xload indicates whether symbolic register is loaded from memory or not at this point
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Spill Code Placement Load Transformation xls xload xls xload + xls
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Spill Code Placement ORA analysis module assigns a cost to each load and store decision variable cost is based on estimated execution count represents the overhead caused by load/store instruction solver module assigns 0 or 1 to each load and store decision variable s.t. conditions are satisfied and spill cost is optimally reduced.
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Spill Code Placement Identifying store spill edges and load spill
Theorem 1 : For optimal spill code placement, it is sufficient to allow a store spill in Grs at each definition edge and at each arc edge that exits a diverge vertex.
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Spill Code Placement Theorem 2 : For optimal spill code
placement, it is sufficient to allow a load spill in Grs at each edge that enters a use vertex, at each edge that enters a last-use vertex, and at each arc edge that enters a merge vertex.
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Spill Code Placement xdefB xstoreB xcontB xdefB xuse-endB xload1B
xuse-contB + xload2B xdefB xuse-endB xuse-contB xstoreB xcontB xload1B xload2B xdefB xuse-endB xuse-contB Symbolic Register Graph for B Symbolic Register Graph for B after applying load and store transformations
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Representing Memory ORA analysis module also produces a memory graph for each symbolic register. memory graph represents the memory location that holds the corresponding symbolic register if the symbolic register is spilled each real register’s copy of symbolic register graph for s is connected to memory graph for s.
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Representing Memory memory graph is produced by applying block-end, block-start and continuation transformations to instruction graph. continuation transformation is applied at all definition, use, last-use & inactive vertices. decision variable that labels each memory graph edge indicates whether the symbolic register is in memory at that point. two new transformations are applied to memory graph’s store spill and load spill edges.
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Representing Memory Memory-store Transformation
x1store xss x2store xss xss + Σr xrstore Memory Store Transformation
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Representing Memory Memory Load Transformation
x1load xls x2load xls xmemory-cont Σr xrload <= xls xmemory-cont <= xls Memory Load Transformation
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Representing Memory x1storeB x2storeB x1load1B x2load1B xmem-cont1B
x1load1B + x2load1B <= x1storeB + x2storeB xmem-cont1B <= x1storeB + x2storeB x1load2B + x2load2B <= xmem-cont1B xmem-cont2B <= xmem-cont1B B = A + 1 -- = B * 2 -- = B / 2 Instruction Graph for B Memory Graph for B
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Representing Memory xuse-contB + xload2B xdefB xuse-endB xuse-contB
xstoreB xcontB xload1B xload2B xmem-cont1B xmem-cont2B x1storeB + x2storeB G1B Memory Graph for B G2B
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Representing Memory the symbolic register can be spilled from one real register and restored into another thus live ranges are optimally split
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ORA Solver Module uses 0-1 integer programming to assign each decision variable a value 0 or 1 s.t all conditions are satisfied and the cost of decision variables set to 1 is optimally reduced. a 0-1 integer program has the form – minimize cTx subject to Ax = b, 0<= x <= 1, x integer. where, matrix A holds coefficients of integer program constraints, b = vector of constraint right hand sides c = vector of cost coefficients x = vector of integer program variables
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ORA Rewrite Module determines the decision variables set to 1 and the corresponding register allocation action modifies the intermediate instructions
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Experimental Results prototype ORA allocator built into gcc, version 2.5.7 uses execution profile to determine spill costs ORA, GCC and graph coloring allocators compared experimentally code for SPEC92 benchmarks generated for PA-RISC architecture ORA integer programs solved using CPLEX ORA allocator given a solver time limit if optimal solution not found within the time limit, best integer solution used.
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Experimental Results number of functions allocated using ORA allocator: for 1024 sec time limit, 92% 82% optimally allocated spill code overhead : ORA – produces net decrease of 120 million cycles GCC & graph coloring allocators – net increase of more than 1050 million instruction cycles
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Experimental Results ORA integer program show O(n2.5) solution time complexity for optimal solutions. O(n1.3) relationship between ORA integer program size and function size. O(n3) relationship between total allocation time and function size. O(n1.3) relationship between ORA allocator’s total memory usage and function size.
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