0. Using JMP to Optimize Performance-Sensitive Semiconductor Products
Discovery Summit 2016
Scott Rubel
todd Jacobs
Jim Nelson

1. Overview
Modern chip designs have multiple IP components with different process, voltage, temperature sensitivities
Optimizing mix to different customer requirements (bins) across process window has huge gross margin impact
Monte Carlo simulation optimal for simulating speed-power distribution and bin mix under different conditions
Large number of statistical parameters (40 – 60 typically, plus covariance matrix) and bin limits (~20-100)
Consistent extraction, documentation critical to manage these
JMP scripting provides statistical tools + journaling = unique capability
Fast execution (1-5 minutes) and consistent documentation allow comparison of multiple business cases

2. Simulation Flow
Product Data or Design Inputs
Descriptive Statistics
scaling
Simulated Cloud
Limits
Alternate scenarios
Distributions
Alternate scenarios
Vary scaling or limits to explore different process scenarios, evaluate profitability
Software can simulate multiple limit scenarios in one run
Process Window
Optimal Spec, Process

3. Speed-Power Distributions
Frequency is (nearly always) a linear function of log(static current), plus noise
3 parameters for power, plus 3 per frequency

4. Speed-Power Distributions
“Distribution” is fraction of die meeting minimum speed, maximum power specs for a given spec, voltage

5. Speed-Power Distributions
Testing spec at multiple voltages improves distribution
Lighter (darker) regions show additional die that will pass when tested to higher (lower) voltage

6. Speed-Power Distributions
Die that fail one spec can still pass another
Red region: high-speed, high-power spec
Blue region: low-speed, low-power spec

7. Speed-Power Distributions
Some die can pass multiple specs
Shaded areas show die which can pass combinations of green, red, and blue specs
Known as “combination (combo)” bins
Can be used to flex supply from one bin to another
Complex boundaries require custom logic to handle correctly
Logical OR across voltages
Logical AND across patterns and temperatures

8. Pass/Fail, Binning Calculations
Overall rate can consider either all possible die which pass bin, or assign die to first bin passed
Logic is straightforward, but tricky. Scripting ensures it is done right every time.
Pass/Fail results for multiple bins, multiple die 

9. Sample Input Configuration File
Statistical parameters saved to configuration file after initial run
Configuration parameters for simulation runs
Limits for each pattern, temperature, voltage combination

10. Data validity checks
JMP scripting ensures common analysis errors are avoided:
Perfectly correlated parameters
Nonphysical correlations
Bin/pattern/grouping combinations that guarantee zero distribution always
Missing limits
Missing source data
Missing/invalid parameters
Missing grouping parameters (voltage, temperature, pattern)
Missing/duplicate Fmax pattern names
Missing test sort order
Red items are particularly easy to miss: simulation may run but produce deceptive results

11. Journal Output
X-Y plot shows simulation for target process condition
Each point represents bin distribution for a particular process condition
Input Table: /C:/Documents/data extracts/Feb 2015/Test.jmp
Power limit voltage sensitivities documented
Journal file contains full configuration table, linear Fmax fit equations, and covariance tables
X-Y plots can show any two input parameters desired, with appropriate limits
Data tables for target process simulation and distributions automatically saved to specified location

12. Scenario Modeling: Variance Scaling
Factory process improvements affect bin distribution through tighter variance
Tool has Variance Scaling parameter to model this; included in standard documentation
Generating plots requires separate runs

13. Scenario Modeling: Test Program Changes1 2 4 5 3
Original sort order: orange, red, light green, dark green, blue
Curves at right show yield to each bin given this order
Sum is 100% (die not double-counted)

14. Scenario Modeling: Test Program Changes1 2 4 3 5
Consider swapping red and dark green bins in sort order
New sort order: orange, dark green, light green, red, blue
Bin distributions change to new plot
Note that light green distribution drops to zero while dark green increases dramatically
Red bin distribution also reduced

15. Scenario Modeling: Pre-Assembly Speed Sorting
Script codes simulated die based on bin assignment, allowing visual assessment of how parameters align with binning
Based on wafer speed testing these units are built in a different package
Distributions for single package look very different than overall mix

16. Scenario Modeling: Variable power limits
B1 limits can be varied in single iterate run
Here 11 different values of power limit used
Distribution table can be used to create other graphs as desired
Example shows impact of power limit on supply to Bin 1

17. Scenario Modeling: Frequency Loss
Tool evaluates different aspects of distribution as frequency is impacted: process target must be increased, process window shrinks, and maximum distribution drops
Simulation shows up to ~40 MHz of speed loss tolerable. Key input for Design, Marketing teams

18. Summary Built-in validation manages complex inputs
Math is taken care of for users, allowing focus on results
Standard output ensures consistent, thorough documentation
Can be seeded with data prior to tapeout to ensure successful product launch
Significant cost savings, revenue improvement
Concrete feedback to Marketing and Design teams enhances customer engagement
Tool allows rapid evaluation of different production scenarios
Easy to perform sensitivity analyses