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Published byNicholas Barrett Modified over 6 years ago
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HZB Proposal for a – New Readout Board for Delay Line Detectors
Thomas Wilpert / G-A1 / Detector Laboratory
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Experiments at BER-II – Readout Systems
V1 Membrane Diff. V2 Cold TAS V3 TOF Spectr. (2014) V4 SANS V5 NSE V6 Reflectometer V7 Tomography B8 n-Activation V12 USANS V14 Mirror Test Station V15 Extreme Env. Diff. V16 VSANS V17 Detector Test Station V18 BioRef V19 PONTO V20 ESS Test Beam Line Delayline Detector LPSD Tube 8 2 1 1 1 1 1 544 4 1 112 1 1 1 1 1 112 E1 TAS E2 Flat-Cone Single Crystal Diff. E3 Residual Stress Diff. E4 Single Crystal Diff. E5 4-Circle Single Crystal Diff. E6 Powder Diff. E7 Strain Scanner E9 Powder Diff. E10 ³He Diff. 192 ASAX at Bessy
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MWPC – ³He-2D Detector EMBL, DENEX (300x300 mm²) ~200 wires/plane
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Delay Line Technique 1
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Delay Line Technique 2 50 ns IV110 tr = 1.0 ns
nf = 1.6 db Z = 50Ω ± 20% IV118 tr = 1.2 ns nf = 0.4 db Z = 50Ω ± 20% (no coils!) Delay [ns] Z [Ω] C [pF] L [nH] 1 50 20 2 40 100 3 60 150 Delay [ns] Z [Ω] C [pF] L [nH] 2.17 46 47 100 1.97 51 39 1.82 55 33
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Amplitudes down to noise level low thresholds for high efficiency
Analog Signals 10mV 1V 80 ns Anode Anode Signal/Noise ~ 1/100 Amplitudes down to noise level low thresholds for high efficiency only with HZB-amplifiers IV110/IV111/IV112 Development: B. Namaschk / NP-H11 IV110
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Multi-hit Delay Line Position Encoding
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TI DSP FPGA acam TDC 256 MB Memory
DeLiDAQ – Delay Line Detector Data Acquisition TI DSP FPGA acam TDC 256 MB Memory Designed by B. Gebauer (HMI-SF7) and F. Levchanovski F.V. Levchanovski et al. / Nuclear Instruments and Methods in Physics Research A 529 (2004) 413–416 F.V. Levchanovsky et al. / Nuclear Instruments and Methods in Physics Research A 569 (2006) 900–904
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DeLiDAQ – Helpful Counters for Detector Setup
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5 TDC channels (FPGA-based)
HZB Proposal Up-to-date DeLiDAQ Board FPGA 5 TDC channels (FPGA-based) ? like on TRB for HADES (M. Traxler/GSI)
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Base Board Mini-Module Plus
Virtex-5 FXT Mini-Module Plus used with ASIC & ADC board for MSGC-Detector development with AGH Krakow (B. Mindur, T. Fiutowski) ASIC board ADC board with test points for validation 10 cm 6 cm Mini-Module Plus Virtex 5 FPGA Adapter board 2 board-to-board connectors: Samtec QSE F-D-A New Mini-Module announced with XILINX Kintex-7 FPGA (
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