1. CSC Hardware Upgrade Status
4/21/2018
CSC Hardware Upgrade Status
Mikhail Matveev
Rice University
Muon Phase II Upgrade Workshop
CERN
June 15, 2017

2. Outline ● DCFEBv2 design modifications ● Comparator ASIC Update
4/21/2018
Outline
● DCFEBv2 design modifications
● Comparator ASIC Update
● ALCT Upgrade
● Evaluation of new optical parts
● Low Voltage Distribution Board LVDB5 Status
● HV Update
● Irradiation Tests in late 2016 – 2017 (TAMU, UCDavis, CHARM)
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

3. Hardware Upgrade Summary
4/21/2018
Hardware Upgrade Summary
● DCFEBv2: Digital Cathode Front End Board version 2
● LVDB: Low Voltage Distribution Board
● OALCT-S6: Optical Anode Local Charge Track Board based on Spartan-6 FPGA
● ALCT-S6: Anode Local Charge Track Board based on Spartan-6 FPGA
● OTMBv2: Optical Trigger Motherboard version 2
● ODMB7: Optical DAQ Motherboard serving 7 DCFEBs (ME1/1)
● ODMB5: Optical DAQ Motherboard serving 5 DCFEBs (ME234/1)
● FED: Frond End Driver Board
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

4. DCFEBv2 Design Modifications
4/21/2018
DCFEBv2 Design Modifications
● Replace one Xilinx XCF128X PROM with two Xilinx XCF32P PROMs
- both XCF128X and XCF32P are similar in terms of radiation
tolerance, but XCF128X is obsolete and may not be available in
required quantity in several months. XCF08P/16P/32P are still active.
● Add another PROM (XCF08P) to keep parameters
● Add a GBTx ASIC to implement PROM-less option for the FPGA
● Replace commercial optical transceivers with rad hard VTTx/VTRx
● Minor layout and placement improvements
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

5. PROM-less Option for DCFEBv2
4/21/2018
PROM-less Option for DCFEBv2
● Recent radiation tests showed some Xilinx PROMs (both XCF128X
and XCF32P) failed after 10 kRad
● PROM-less solution for DCFEBv2 Virtex-6 FPGA would mitigate any
radiation damage to PROMs
● Use radiation hard GBTx ASIC for downloading. Possible options:
- Full duplex connection from FED to DCFEB
- Full duplex connection from ODMB to DCFEB
- Simplex connection from ODMB to DCFEB
● Utilize JTAG device with non-volatile I/O to select which programming
option (PROM or GBTx) is active
- DS4550 is a candidate; under tests
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

6. Proof of Principle ● Used GEM Optohybrid board (OHv2b) with GBTx ASIC
4/21/2018
Proof of Principle
● Used GEM Optohybrid board (OHv2b) with GBTx ASIC
● OTMB Virtex-6 FPGA was a target
● The bitfile was sent from CTP7 processor DDR RAM to the GBTx
fiber link at 640Mbit/s
● Successfully programmed the OTMB FPGA 100 times
● Programming takes 90 milliseconds
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

7. 4/21/2018
LCT Comparator ASIC
● CFEB/DCFEB triggering is based on comparator ASIC
- Each ASIC comprises a network of 50 comparators and a digital part
- Generates a serialized trigger output for 32 half-strips to TMB/OTMB
- 6 ASICs per CFEB/DCFEB
- designed and built in
- we have a deficit of ~1000 ASICs for DCFEB upgrade
● New vendor: ON Semiconductor
- order placed in late 2016, ~3000 ASICs
- same package (TQFP64)
● Engineering sample of 100 ASICs ready in spring 2017
- 96 received at UCLA in May (4 rejected during assembly)
- 94 passed tests at UCLA (2 rejected)
- 6 were OK after irradiation to 30 kRad at UCDavis cyclotron
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

8. ALCT Mezzanine Upgrade
4/21/2018
ALCT Mezzanine Upgrade
● 144 Virtex-E based ALCT mezzanine cards on ME1/1 and ME4/2 chambers
were replaced with Spartan-6 mezzanines in LS1
● Plan a similar ALCT-S6 mezzanine for 216 ME123/2 chambers (latency)
● Plan a similar OALCT-S6 board with optical link for 180 ME1234/1
chambers (latency and ~5x rate increase)
● These designs are well understood (UCLA); to be finalized by the
end of 2017
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

9. Optical Link for OTMB/ODMB (1)
4/21/2018
Optical Link for OTMB/ODMB (1)
12-channel SNAP12 optical receiver from Reflex Photonics
● Old SN-R12-C00501 part (being used on all ME1/1 OTMB and ODMB
boards) is not available any more
● New SN-R12-C01001 is available ($480)
● Rad testing done at UCD cyclotron in May 2017, OK up to 25 kRad
● Low SEU rate, comparable to older part
Conclusion: can be used for CSC
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

10. Optical Link for OTMB/ODMB (2)
4/21/2018
Optical Link for OTMB/ODMB (2)
Avago AFBR channel optical receiver
● Not pin-compatible with SNAP12, so can’t be used directly
● A small pluggable card was designed by Rice/TAMU for evaluation
on existing OTMB mezzanine board
● Tested at UCDavis cyclotron in May Observed very high SEU
rate even at low beam intensity for both devices under test.
Conclusion: can’t be used for CSC
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

11. Optical Link for OTMB/ODMB (3)
4/21/2018
Optical Link for OTMB/ODMB (3)
Samtec FireFly 12-channel optical receiver
● Mechanically very different from SNAP12 and Avago (see next slide)
● A small pluggable card was designed by Rice/TAMU for evaluation
on existing OTMB mezzanine board
● Passed bench test, to be irradiated at UCDavis later this year
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

12. Samtec FireFly Optical Link
4/21/2018
Samtec FireFly Optical Link
● 12-channel receiver/transmitter
● 850 nm VCSEL technology
● Much smaller than Avago or Reflex Photonics parts
● 1…14 Gbps/ch (much faster than Avago or Reflex Photonics parts)
● Cheaper ($250) than comparable Avago or Reflex Photonics parts
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

13. 4/21/2018
LVDB5 Board for ME234/1
● Will provide power to ALCT and 5 DCFEBv2 on ME234/1 chambers
● 120 boards total ( spares)
● Design, fabrication and testing by JINR (Dubna) and INP (Minsk)
● Based on Sharp PQ7DV10 voltage regulator
● Will use existing Low Voltage Monitoring Board (LVMB)
● Schematic design is done and prototypes are being built
● Two test stands will be assembled (production site and CERN)
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

14. 4/21/2018
HV Update
● Presently: CAEN system for ME1/1 and UF/PNPI system for the rest
of CSC
● Currents in the CSC scale linearly with the luminosity. The ME2/1,
ME3/1, and ME4/1 chambers are closest to the beam and draw the
largest currents. Therefore, one expects a total current of about 700
µA in a pair of ME2/1 chambers served by a single HV distribution
board. The present limit of the HV distribution boards, set by the
master HV boards, is 1.5 mA. This gives a safety factor of only two,
which is uncomfortably small. Also need more reliable current
measurements for ME1/1.
● The plan is to have a common HV system for all CSCs.
- 38 new 9-channel Master boards
- each channel will have its own HV power source 0…4000V,
up to 2.5mA . This gives a safety factor of 4. A prototype exists.
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

15. Irradiation Tests of Xilinx PROMs
4/21/2018
Irradiation Tests of Xilinx PROMs
● Recent OSU update on absorption dose at EPROM positions, HL-LHC
10-years (no safety factor)
● Xilinx PROMs currently in use on CSC chambers
- XCF128X (504 DCFEB boards)
- XCF08P/32P (144 ALCT-S6 mezzanines)
- XC18V01/04 (on older CFEB and ALCT boards)
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

16. Irradiation Tests of Xilinx XCF32P PROMs
4/21/2018
Irradiation Tests of Xilinx XCF32P PROMs
● April 2013 at TAMU reactor: 1 device, OK after 30 kRad
(but irradiated without power)
● November 2016 at CHARM: 1 of 2 devices failed after 35 kRad
● March 2017 at TAMU reactor: 4 devices, OK after 10 kRad, but all
failed after 15 kRad
● May 2017 at UCDavis cyclotron: 2 devices; OK after 30 kRad
Conclusion: Good up to 10 kRad. Tests finished.
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

17. Irradiation Tests of Xilinx XCF128X PROMs
4/21/2018
Irradiation Tests of Xilinx XCF128X PROMs
● August 2011 at TAMU cyclotron: 1 device, OK after 3.7 kRad
● November 2016 at CHARM: 2 devices, both failed after 35 kRad
● March 2017 at TAMU reactor: 2 devices, OK after 10 kRad, but both
failed after 15 kRad
● May 2017 at UCDavis cyclotron: 2 devices; OK after 30 kRad
Conclusion: Good up to 10 kRad. Tests finished.
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

18. Radiation Test at CHARM
4/21/2018
Radiation Test at CHARM
● Three DCFEB prototypes, LVMB7, PPIB, LV custom test board
● Plan to irradiate to TID=30 kRad in 2 steps (15 kRad in June 7-15 and
15 kRad in August 30 - September 6)
● Test DCFEB boards with STEP test software after each irradiation cycle
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017

19. Conclusion and Near Future Plans
4/21/2018
Conclusion and Near Future Plans
● Finalize the PROM-less implementation and other design
modifications on DCFEBv2 by October 2017
● Very good yield of comparator ASICs, the order is in production
● Will use rad hard VTTX/VTRX optical parts for on-chamber upgrades.
Evaluation of new optical parts for OTMBv2/ODMB5/7 is in progress.
● LVDB5 prototype is being built
● Another round of irradiation tests at UCDavis cyclotron later in
summer (Samtec FireFly optical receiver, few more simple parts).
Irradiation tests at CHARM ongoing, results not before October.
June 15, 2017
Muon Phase II Upgrade Workshop, CERN, June 14-16, 2017