1. CMS DETECTOR PHYSICS PERFORMANCE:
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out 1
CMS
Compact Muon Solenoid
It is a general purpose particle detector designed to run at the highest luminosity of LHC and optimized for muon detection and track reconstruction.
It is one of the 4 main detectors that will be placed on the ring of the LHC at CERN.
CMS DETECTOR PHYSICS PERFORMANCE:
Higgs physics: CMS optimized for Higgs Mass between 0.08 TeV < MH < 1 TeV through different decay channels.
SUSY Higgs: CMS may confirm some predictions of the Supersimmetry model.
Heavy Ions physics: detection of quark-gluon plasma QGP through muons and jets measurements.

2. TRACKER: high pt charged particles tracks reconstruction ECAL:
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out 2
MUON DETECTOR:
Barrel: DT & RPC
Endcap: CSC & RPC
TRACKER: high pt charged particles tracks reconstruction
ECAL:
precise measurements of electrons and jets
RETURN YOKE z x y
SUPERCONDUCTING MAGNET
GENERAL FEATURES:
15 m diameter x 21.5 m length.
12500 tons weight.
Up to 4 Teslas magnetic field.
Collaboration of 36 countries.
Operative by 2007. Φ
Low angle calorimeter:
to insure a hermetic detector
HCAL:
hadrons energy measurement

3. CMS-DT Chambers Read-Out
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
ROB 3
DT-Chamber:
1 Superlayer Φ
1 Superlayer θ
Honeycomb
MINICRATE
GAS: Ar/CO2 (85/15)
HV: wires V
strips V
I-beams V
Tmax < 400 ns
Drift velocity ~ 55 μm/ns
Single wire resolution < 300 μm => 100 μm Φ
150 μm θ

4. Pattern Comparator Trigger
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out 4
Muon Trigger System
Mean-timer technique. DT
hits
CSC
RPC
Local trigger
Track segments
Pattern Comparator Trigger
<4 barrel + <4 endcap muon candidates
Regional trigger
Barrel track finder
<4 muon candidates
Endcap track finder
Global Muon trigger
<4 muons
Level 1 trigger
Coincidence
After a fixed delay (Tdrift max) the shift registers give the corresponding bunch crossing, track position and angle to be used in muon trigger.

5. Overview of the Electronics Layout of a Chamber
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out 5
Overview of the Electronics Layout of a Chamber

6. CMS-DT Chambers Read-Out
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out 6
Read Out Scheme
DAQ
DDU/FED
60 ROS´s
10,960 FEB´s
1500 ROB´s
172,200 chamber channels
2 m.
LVDS copper link
10 KHz
20 m.
1500 LVDS copper links
240 Mbps
Throughput ~ 16 Mbps
100 m.
60 optical links
800 Mbps
Throughput ~ 80Mbps

7. ENVIRONMENTAL RADIATION
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
Design Parameters 7
RATES
40.08 MHz clock
10-34 cm-2s-1 luminosity, at 25 ns bunch crossing.
10 KHz/cm-2 charged particles rate:
10 KHz noise per TDC channel (cell dim: 250 x 4 cm)
L1 Accept reduces to 1 KHz hit/TDC channel.
Occupancy: Aprox. 0.5 muons/(event·chamber) => 0.3 hits/(event·TDC)
250 DT-chambers, a total of 172,200 anode channels.
Overlapping triggers due to a trigger latency of 3,2 us.
100 KHz triggers
neutron fluence 10 years < 1010cm-2
charged particles flux < 10 cm-2s-1
10 year integrated dose ~ 1 Gy
ENVIRONMENTAL RADIATION
Radiation hard devices are not going to be employed, radiation tests have to be performed to every component.
Stray magnetic fields, in the barrel region around 0.08 Teslas.
Limited maintenance for 10 years of operation.
OTHERS

8. CMS-DT Chambers Read-Out
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out 8
HPTDC, Why?
Highly programmable which provides flexibility.
High integration, 32 channels per chip.
Overlapping trigger handling.
Trigger latencies (50 μs) large enough to accommodate our requirements (3.2μs).
Time resolution of ~265 ps RMS in low resolution mode (Required resolution~1ns)
Implemented in a radiation tolerant technology, up to levels of 30 Krad total dose with slight increase in power consumption.
Up to 2MHz hit rates, much more than our needs (noisy channels ~ tens of KHz).
Up to 1 MHz trigger rates, enough for 100 KHz maximum estimated.
Bunch and event identification.
JTAG port for programming and monitoring.
Flexible read-out interface: parallel, serial or byte-wise.
Error flags signalling lost of events, TDC internal errors, etc. and self-bypass on error.

9. Architecture Definition
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out 9
Architecture Definition
250 DT-chambers, a total of 172,200 channels with a particular distribution:
Number of TDC´s per ROB (max. 16)
4 TDC´s connected in series for JTAG configuration.
Token ring scheme for readout.

10. CMS-DT Chambers Read-Out
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
ROB Basic Features
1010
10 layers PCB.
Ground planes for thermal dissipation (water cooling) and fast signals (clock) isolation.
Dimensions: x 9.8 cm
2.5V and 3.3V power supply.
Power supply protection circuitry:
In case of 2.5V current consumption over 1.5 A or 3.3V over 1A, power supply is disconnected, with powering on cycles every 700 ms (10% power consumption of short-circuit).
Sensor for temperature, 2.5V and 3.3V voltage and 2.5 V current monitoring.
(Maxim DS2438).
ROB´s individually addressed within a minicrate: Up to 7 boards/minicrate => 3 bits address range.
ROBUS: Common bus per minicrate for trigger, event and bunch resets, test pulse signalling, Jtag protocol, address bits, power on...
Independent LVDS clock distribution.
LVDS Hits -> to LVTTL for trigger boards and enabling/disabling channels on test pulse mode. (National DS90LV048A)

11. ROB power on protection circuitry
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
1111
ROB power on protection circuitry

12. ROB Read-Out Mechanism
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
1212
ROB Read-Out Mechanism
Clock synchronous token ring passing scheme where one TDC is configured as Master.
An Altera FPGA manages the data_ready/get_data protocol, slowing down the readout frequency to 20 MHz.
Bypass on error mechanism implemented.
Byte-wise read-out scheme with commercial serializer DS92LV1021:
At 20 MHz => Max. Bandwidth 240 Mbps.
1 AC coupled LVDS copper link
per ROB to ROS.
12 bits: 2 control bits START/STOP.
1 valid data bit.(Generated at the FPGA).
1 parity bit from HPTDC.
8 data bits (MSB first).
Link
TDC data
Global headers and trailers.
Single edge leading measurement.
Error flag words.

13. CMS-DT Chambers Read-Out
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
1313
ROB - 128
ROB - 32

14. CMS-DT Chambers Read-Out
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
FPGA Control logic
1414
Triple redundancy on ALTERA FPGA registers. d 1 2 3 q
FF1
FF2
FF3
SEU <= (FF1 xor FF2) or
(FF1 xor FF3) or
(FF2 xor FF3)
Single event upset counter for radiation tests.
Test pulses.
For testing chamber channels and electronics during spill interleaves.
Enable TDC 0 ch 0-3
Enable TDC 0 ch 0-7
Enable TDC 0 ch 7-12
TEST MODE
...

15. Functional and Characterization Tests
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
Functional and Characterization Tests
1515
Test beams at Gamma Irradiation Facility (CERN).
Oct. 01: test beam at GIF (Gamma Irradiation Facility, CERN).
MB2 chamber operated under real gas and voltage conditions.
Two different types of beam:
• non structured and 1200 triggers/s
• 25 ns structured and 5200 triggers/s
With and without gamma background during acquisition.
Validation with overlapping triggers
No significant errors were found neither in HPTDC nor in the ROB design,
(incorrect wordcount when using local headers).
TDC can stand high hit rates, including noisy channels (~MHz).
Irradiation tests at the Cyclotron Research Centre (UCL)
5·1010 p.cm-2 of 60 MeV protons.
Regulators (MIC BU, MIC BU): ΔV<1%
4 ALTERA FPGA´s: No effect.
HPTDC v 1.1: 1 recoverable SEU. Expected rate <1/day whole detector.
Rest of ROB IC´s: No effect.

16. Functional and Characterization Tests 2
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
1616
Functional and Characterization Tests 2
Neighbour channels crosstalk
Time measurement shift in one ROB channel due to neighbour signals.
Below half HPTDC bin resolution < ±0.35 ns (set-up resolution).
Temperature cycling.
Small slopes: 5 min/ºC.
Ambient temperature from 0ºC to 70ºC.
ROB continuously operated and monitored.
All devices bear perfectly temperature conditions.
Small time shift: 900 ps/70ºC. Max variation ~ 40 ps/ºC.
LV regulators temperature dependence
Negligible variations due to temperature (< 5mV/30ºC).
Lifetime test
ROB fully operational at 105ºC ambient temperature for 4 months (3100 hours).
Frequently operated and status monitored.

17. Functional and Characterization Tests 3
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
1717
Functional and Characterization Tests 3
Link reliability
RO link to ROS-8 prototype has been tested using a TTC system (TTCvi, TTCex, TTCrx).
Measured jitter on ROB with TTC clock: ~40ps RMS; ~380ps pk-pk
BER < 10-15
No observed influence of TTC commands.
 = 0.26 ns
Low resolution:
Bin size : ns
Measured resolution: 265 ps
Resolution measurements

18. Functional and Characterization Tests 4
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
Functional and Characterization Tests 4
1818
L1 buffer parity error
HPTDC v 1.3 has shown a problem with parity of L1 buffers related to high hit rates (Several channels simultaneously non-synchronised with clock).
This problem appears in particular groups (mainly 2 and 3) of particular TDC´s and is coupled to 2.5V voltage.
About 11% of the chips tested and accepted were affected at voltages  2.5V.
SET-UP

19. Functional and Characterization Tests 5
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
1919
Functional and Characterization Tests 5
Other incidences
Dependence of time measurement with pll current.
Problem on dll lock initialization in HPTDC v 1.2.
Coarse count error due to an influence between hits and clock in HPTDC v 1.1.
25 ns
# errors
Pulse delay to clock

20. CMS-DT Chambers Read-Out
HPTDC Workshop.
C. Fernández-Bedoya. - C. Willmott. CIEMAT.
May, 13th. 2003
CMS-DT Chambers Read-Out
2020
Summarizing...
HPTDC has demonstrated to be appropriate for our design,widely covering our requirements.
Version 1.3 will be assembled in our final 1500 ROB´s.
A total amount of 6000 HPTDC´s will be used for the Read-Out electronics of the CMS DT-chambers.