1. Combinational Circuits and Boolean
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2. Common Combinational Circuits
NAND gates and Duality
Adders
Multiplexers
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3. De Morgan again A NAND gate: Y = A.B = A + B
is the same as an OR gate with two NOT gates
Similarly a NOR gate is the same as an AND gate with two inverters
Y = A + B = A.B
not the individual terms
change the sign
not the lot
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4. Dual gates not the individual inputs change the gate not the output
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5. Truth Tables and Boolean Notation
NAND Gate Representation
It is possible to implement any boolean expression using only NAND gates
NOT X X
AND
A.B A
A.B B OR A
A+B B
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6. Truth Tables and Boolean Notation
NAND Gate representation
Implement the following circuit using only NAND gates x2 x4 x3
De Morgan can also be represented visually:
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7. Solution Dual the gates, remember two nots together can be removed.x3 x2 x4 A B
A.B
A+B
AND feeding OR
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8. Exercise Implement NOT, AND and OR using NOR gates
Example AND gate dual circuit:
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9. Solution Similar pattern to using NAND gates (not surprising) NOT ANDOR X A B
A.B
A+B
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10. Truth Tables and Boolean Notation
NOR Gate representation
It is also possible to implement any boolean expression using only NOR gates
Implement the following circuit using only NOR gates X4 X3 X 2
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11. Solution Two NOR gates in sequence acting as NOT’s can be eliminated:X4 X3 X 2
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12. Examples The half adder A B S C 1
The half adder is a circuit for adding two single bit numbers
Develop a truth table and Boolean expressions for the half adder A B S C 1
carry 1
S and C are the Sum and Carry
A B S C
s = notA.B + BnotA
= A + B
c = A.B
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13. Half adder The sum is XOR operation and the carry an AND: A B S C 1 C1
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14. Examples The full adder
Develop a truth table and Boolean expressions for the full adder, this circuit also includes a carry in.
Cin A B S C
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Sum A
full
adder B
carry 1
Cout
Cin
0Cin1 0Cin1 1Cin1 1Cin1
1 0carry1 0carry1 1carry 1
SUM
Cin AB 00 01 11 10
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Cin A B S C 1 1 1
Cout
A BC 00 01 11 10 1 1 1 1 1

15. Truth table for full adder
C in A B S
C out 1
Exercise:
Complete the Karnaugh maps for the Sum and the Carry out columns
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16. K maps for sum and carry AB C in 00 01 11 10 1 AB C in 00 01 11 10 1
Sum – 1 when odd number of inputs is 1 = XOR gate
Carry out - simplifies to 3 pairs AB
C in 00 01 11 10 1 AB
C in 00 01 11 10 1
C out = A.B + A.Cin + B.Cin
Sum = Cin xor A xor B
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17. Full adder circuit A B Sum Count C in Sum = Cin xor A xor B
Cout = A.B + A.Cin + B.Cin
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18. Examples The Multiplexer
Selects one of 2n inputs and copies it to a single output
The selected line is determined from the bit combination (address) on the n selection lines
e.g. 1 from 2 mutiplexer
n = 1 a
out
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
sel a b out b 1
sel
sel a b out
sel ab 00 01 11 10
A BC 00 01 11 10 1 1 1 1 1 1
out = not(sel).a + sel.b
out =
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19. 2:1 Multiplexer sel a b out ? 1 sel a b out 1 AB sel 00 01 11 10 1? 1
sel a b
out 1
if a is selected, don’t care about b. AB
sel 00 01 11 10 1
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20. K map for 2:1 Multiplexer AB sel 00 01 11 10 1 output = sel.a + sel.b1
output = sel.a + sel.b
data
Principal can be extended to
4:1 – 2 select lines and 4 data lines
8:1 – 3 select lines and 8 data lines
and so on…
out
sel
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21. What you should be able to do:
Change circuits using one set of gates (eg AND, OR, NOT) to their equivalent using NAND or NOR gates only (and vice versa).
Be familiar with half-, full- adders and multiplexer circuits.
Be able to construct and interpret Karnaugh maps with up to 4 input variables.
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